Memory Device Programming Loop Voltage Adaptation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Next-generation memory devices require high integrity, non-volatility, high speed, and low power consumption, but existing technologies face challenges in efficiently managing voltage levels and leakage currents across signal lines during programming loops.

Innovation Solution

A method of operating memory devices with memory cells arranged in regions where first and second signal lines cross, involving the determination of pulses and inhibit voltages based on the number of programming loops to adjust voltage levels and reduce leakage currents, by sequentially applying pulses and inhibit voltages to selected and unselected memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple programming loops are executed to improve memory cell programming reliability, then programming reliability is improved, but leakage current in unselected memory cells increases and power consumption increases

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidleakage current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies different voltage levels to different groups of unselected memory cells based on their specific leakage characteristics. Memory cells are divided into first unselected memory cells and second unselected memory cells, with different inhibit voltages applied to each group. This local differentiation allows targeted suppression of leakage current in regions where it is most problematic while maintaining programming reliability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent dynamically adjusts the inhibit voltage levels applied to unselected memory cells based on the programming loop count and detected leakage characteristics. The control circuit modifies voltage parameters (first inhibit voltage and second inhibit voltage) during the programming process, changing them from static to adaptive values that respond to actual device conditions, thereby suppressing leakage while maintaining programming effectiveness.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple programming loops are executed to improve memory cell programming reliability, then programming reliability is improved, but power consumption increases

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies different voltage levels to different groups of unselected memory cells based on their specific leakage characteristics. Memory cells are divided into first unselected memory cells and second unselected memory cells, with different inhibit voltages applied to each group. This local differentiation allows targeted suppression of leakage current in regions where it is most problematic while maintaining programming reliability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent dynamically adjusts the inhibit voltage levels applied to unselected memory cells based on the programming loop count and detected leakage characteristics. The control circuit modifies voltage parameters (first inhibit voltage and second inhibit voltage) during the programming process, changing them from static to adaptive values that respond to actual device conditions, thereby suppressing leakage while maintaining programming effectiveness.

Inventive Principle:
Principle #35Parameter changes

3Object-generated harmful factors

If high voltage levels are applied to unselected signal lines to suppress leakage current, then leakage current is reduced, but interference with selected memory cell operations increases

Engineering Contradiction:
Improveleakage currentVSAvoidinterference with selected memory cell
Core Design Contradiction:
Object-generated harmful factorsVSObject-affected harmful factors

Solution Approach 1:

The patent applies different voltage levels to different groups of unselected memory cells based on their specific leakage characteristics. Memory cells are divided into first unselected memory cells and second unselected memory cells, with different inhibit voltages applied to each group. This local differentiation allows targeted suppression of leakage current in regions where it is most problematic while maintaining programming reliability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent dynamically adjusts the inhibit voltage levels applied to unselected memory cells based on the programming loop count and detected leakage characteristics. The control circuit modifies voltage parameters (first inhibit voltage and second inhibit voltage) during the programming process, changing them from static to adaptive values that respond to actual device conditions, thereby suppressing leakage while maintaining programming effectiveness.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9530494B2Memory device and method of operating the same
Publication Date: 2016.12.27 SAMSUNG ELECTRONICS CO LTD
  • US9530494B2 patent drawing
  • US9530494B2 patent drawing
  • US9530494B2 patent drawing

AI summary

A method of operating a memory device, which includes of memory cells respectively arranged in regions where first signal lines and second lines cross each other, includes determining a plurality of pulses so that each of the plurality of pulses that are sequentially applied to a selected memory cell among the plurality of memory cells is changed according to a number of times of executing programming loops. In response to the change of the plurality of pulses, at least one of a first inhibit voltage and a second inhibit voltage is determined so that a voltage level of at least one of the first and second inhibit voltages that are respectively applied to unselected first and second signal lines connected to unselected memory cells among the plurality of memory cells is changed according to the number of times of executing the programming loops.