Memory Device Write Verification Using Periodic Sense Amplifier Control
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Solution Overview
Problem
Resistive memory devices are sensitive to variations in process, voltage, and temperature, which affects the reliability and efficiency of write operations, as they require precise control of currents and voltages for data storage and retrieval.
Innovation Solution
A memory device with a cell array including a memory cell and a reference cell, a sense amplifier, a voltage driver, and a controller that enables efficient write operations by distinguishing between programming and verification intervals, using different voltage levels and current magnitudes to ensure accurate data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a write operation is performed in resistive memory devices, then data can be stored in memory cells, but the operation becomes sensitive to variations in process, voltage, and temperature affecting reliability
Solution Approach 1:
The patent implements a verification operation after programming to check whether the memory cell has been successfully programmed. This feedback mechanism allows the system to detect programming failures caused by PVT variations and retry the operation, thereby improving reliability despite environmental sensitivities
Solution Approach 2:
The patent applies a write voltage to the memory cell before the actual programming to prepare the cell for data storage. This preliminary action ensures the cell is in the correct state for programming, reducing failures due to process and voltage variations
2Reliability
If the sense amplifier is enabled during the entire write operation, then verification can be performed, but power consumption increases
Solution Approach 1:
The patent enables the sense amplifier periodically - specifically during the verification operation after programming - rather than continuously during the entire write operation. This periodic activation maintains verification capability while significantly reducing power consumption compared to continuous operation
Solution Approach 2:
The write operation is segmented into distinct phases: programming phase and verification phase. The sense amplifier is enabled only during the verification phase, separating the high-power sensing function from the programming function to reduce overall power consumption
3Use of energy by moving object
If the sense amplifier is disabled during programming, then power consumption is reduced, but verification cannot be performed
Solution Approach 1:
The sense amplifier is enabled periodically during the verification operation that follows programming. This ensures verification capability is maintained at critical moments while allowing the amplifier to remain disabled during programming to conserve power
4Productivity
If verification is performed immediately after programming, then write speed is improved, but the sense amplifier must be rapidly switched on and off affecting stability
Solution Approach 1:
The patent applies a write voltage to the memory cell before programming to prepare it for data storage. This preliminary voltage application ensures the cell is ready for immediate verification after programming, enabling fast verification without compromising sense amplifier stability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and efficiency of write operations in resistive memory devices by reducing sensitivity to environmental variations and improving verification speed, thereby improving overall performance.
Implementation Method 1
a sense amplifier configured to sense a difference between a first current flowing through the memory cell and a second current flowing through the reference cell
Data Source
AI summary
A memory device includes: a cell array including a memory cell and a reference cell; a sense amplifier configured to sense a difference between a first current flowing through the memory cell and a second current flowing through the reference cell, based on an activated sense enable signal; a controller configured to inactivate the sense enable signal in a program interval and activate the sense enable signal in a verify interval subsequent to the program interval, during a write operation; and a voltage driver configured to provide a write voltage to the memory cell in the program interval and the verify interval during the write operation, and to provide a read voltage to the memory cell during a read operation.