Memory Die Location Detection on Shared Bus Channels
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Solution Overview
Problem
In memory devices with grouped memory dies, existing technologies face challenges in individually accessing each memory die despite them being coupled with a shared command/address channel, leading to increased processing overhead due to unknown die locations during manufacturing.
Innovation Solution
Each memory die includes a location detection circuit that outputs an identifier based on specific signals, which is stored in non-volatile read-only memory, allowing for individual access during operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If multiple memory dies are coupled with a shared command/address channel, then device integration is improved, but individual die access becomes difficult
Solution Approach 1:
The patent divides the memory system into individually identifiable segments by assigning unique location identifiers to each memory die. The location detection circuit segments the shared command/address channel traffic by detecting which specific die should receive commands based on these identifiers, enabling individual access despite shared physical coupling.
Solution Approach 2:
The location detection circuit acts as an intermediary between the shared command/address channel and individual memory dies. It intercepts and processes commands, determining the appropriate destination die based on location identifiers, thereby mediating access between the shared channel and individual dies.
2Ease of manufacture
If memory die locations are unknown during manufacturing, then manufacturing flexibility is improved, but processing overhead increases
Solution Approach 1:
The patent performs location detection and identifier assignment as a preliminary action during or after manufacturing but before operational use. The location detection circuit automatically determines and stores location identifiers in non-volatile memory, so that when the system operates, no additional processing overhead is needed to determine die locations.
Solution Approach 2:
The memory die performs its own location detection and identifier storage autonomously through the location detection circuit. Each die self-determines its location and stores the identifier without requiring external intervention or complex processing during operation, eliminating ongoing processing overhead.
3Measurement precision
If location detection circuits are added to each memory die, then individual die identification is improved, but device complexity increases
Solution Approach 1:
The patent extracts the location identification function into a separate, dedicated location detection circuit that is distinct from the main memory array and control logic. This separation allows the identification function to be implemented with simple, specialized circuitry rather than requiring complex integration throughout the entire memory die.
Solution Approach 2:
The location detection circuit uses simple, inexpensive components such as basic logic gates, latches, and non-volatile memory elements to store location identifiers. These are relatively simple circuits compared to the full memory array, providing cost-effective identification capability with minimal complexity overhead.
Data Source
AI summary
The subject application is directed to die location detection for grouped memory dies are described. A memory device may include multiple memory die that are coupled with a shared bus. In some examples, each memory die may include a circuit configured to output an identifier associated with a location of the respective memory die. For example, a first memory die may output a first identifier, based on receiving one or more signals, that identifies a location of the first memory die. Identifying the locations of the respective memory dies may allow for the dies to be individually accessed despite being coupled with a shared bus.