Memory System Direct Access Channel for Urgent Event Data Preservation
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Solution Overview
Problem
Current memory systems lack direct memory access capabilities when accessed based on data stored in external memory during urgent events, such as sudden power-offs or thermal warnings, leading to potential data loss and system instability.
Innovation Solution
A memory system and operating method that enable direct memory access from an external device to a host accessible area, allowing for urgent data access and storage without requiring address translation, and include power management to reduce overhead and ensure data preservation during critical events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the memory system uses traditional access methods through the memory controller for urgent events, then data access is possible, but operation delay increases and system response time is prolonged
Solution Approach 1:
The patent segments the memory access path by creating a direct access channel from the external device to the memory device, bypassing the memory controller for urgent events. This segmentation allows critical data access to occur independently of the controller's processing queue, reducing operation delay while maintaining normal access protocols for non-urgent operations.
Solution Approach 2:
The patent introduces an intermediary mechanism in the form of a direct memory access (DMA) channel that acts as a mediator between the external device and memory device. This intermediary pathway enables urgent data transfer without requiring the memory controller to process each access request, thereby reducing operation delay while preserving data integrity through established protocols.
2Loss of time
If the memory system implements direct memory access for urgent events, then operation delay is reduced, but device complexity increases
Solution Approach 1:
The patent implements a universal direct memory access channel that serves multiple functions: it handles urgent event data access, supports various types of external devices, and maintains compatibility with existing memory controller operations. This multi-functional design reduces the need for separate specialized hardware for each access scenario, thereby limiting the increase in device complexity.
Solution Approach 2:
The patent establishes preliminary access paths and protocols for direct memory access during system initialization, preparing the infrastructure for urgent events in advance. By pre-configuring the direct access channel and establishing communication protocols beforehand, the system avoids the need for complex runtime decision-making and hardware reconfiguration, thus limiting complexity increases.
3Reliability
If the memory system provides direct access during urgent events, then data integrity is improved, but power consumption increases
Solution Approach 1:
The patent implements periodic monitoring and activation of the direct memory access channel based on urgent event detection. Rather than maintaining the direct access path continuously active, the system periodically checks for urgent conditions and activates the direct access mechanism only when needed, thereby ensuring data integrity during critical events while minimizing power consumption during normal operation.
Solution Approach 2:
The patent applies local quality enhancement by enabling direct memory access only for specific urgent event scenarios rather than for all memory operations. The direct access channel is selectively activated based on the nature and priority of the access request, providing high data integrity where needed while maintaining standard power-efficient access methods for routine operations, thus balancing reliability and power consumption.
Data Source
AI summary
According to embodiments of the present disclosure, there may be provided a memory system and an operating method thereof, including a host accessible area accessible directly from an external device, transmitting information on the host accessible area to an external memory, receiving a direct memory access request generated based on the information for the host accessible area from the external device according to an urgent event, and providing the external device with a direct memory access to the host accessible area in response to the direct memory access request.