Semiconductor Memory Discharge Structure for Arcing-Free Etching
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Solution Overview
Problem
In the manufacturing of semiconductor memory devices, high aspect ratio etching processes can lead to arcing issues due to voltage differences between the source line and the semiconductor substrate, resulting in defects and reduced yield.
Innovation Solution
Incorporating a discharge portion with a conductive member connected to the source line and semiconductor substrate, which acts as a discharge path to alleviate positive charge accumulation and voltage differences during etching, thereby preventing arcing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high aspect ratio etching is performed to manufacture semiconductor memory devices, then manufacturing precision is improved, but arcing occurs due to voltage differences between source line and substrate
Solution Approach 1:
A discharge portion is introduced as an intermediary element between the source line and substrate. This discharge portion provides a dedicated path for charge discharge, mediating the voltage difference that would otherwise cause arcing during high aspect ratio etching processes
Solution Approach 2:
The voltage difference that causes harmful arcing is converted into a beneficial discharge path. By providing the discharge portion, the potential harmful voltage accumulation is redirected through a controlled route, transforming the harmful effect into a protective mechanism
2Manufacturing precision
If high aspect ratio etching is performed, then manufacturing precision is improved, but yield decreases due to defects from arcing
Solution Approach 1:
The discharge portion serves as a mediator that prevents arcing-related defects during high aspect ratio etching, thereby maintaining both manufacturing precision and production yield by eliminating the harmful voltage difference effect
3Reliability
If discharge portion is added to prevent arcing, then reliability is improved, but device complexity increases
Solution Approach 1:
The device is segmented by adding a separate discharge portion that is electrically connected to both the source line and substrate. This segmentation allows the discharge function to be handled by a dedicated component rather than requiring modification of existing structures
Solution Approach 2:
The discharge portion serves multiple functions: it provides a charge discharge path, prevents arcing, and maintains voltage balance during etching processes. This multi-functionality justifies the added structural element by delivering multiple benefits from a single component
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses arcing and improves the yield of semiconductor memory devices by ensuring efficient charge discharge and maintaining voltage balance during high aspect ratio etching processes.
Implementation Method 1
a conductive member 100 connected to the source line SL and the semiconductor substrate 20
Implementation Method 2
acts as a discharge path to alleviate positive charge accumulation and voltage differences during etching, thereby preventing arcing
Data Source
AI summary
A semiconductor memory device according to an embodiment includes a substrate, a source line, word lines, a pillar, and a first member. The first member is provided to penetrate the source line. The first member includes a first portion which is far from the substrate, and a second portion which is near the substrate. The first member includes a first contact and a first insulating film. The first contact is provided to extend from the first portion to the second portion. The first contact is electrically connected to the substrate. The first insulating film insulates the source line from the first contact. The first member includes a stepped portion at a boundary part between the first portion and the second portion.