3D Memory Program Disturb Countermeasure

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Solution Overview

Problem

In 3D stacked non-volatile memory devices, the reduced spacing between memory cells leads to program disturb issues, where adjacent cells' programming causes electron injection into charge trapping layers, resulting in impaired read operations due to parasitic cells formed between memory cells.

Innovation Solution

Implementing an error correction code (ECC) to detect uncorrectable errors and using an elevated pass voltage during data recovery read operations to narrow and lower the threshold voltage distribution, compensating with adjusted control gate, source voltage, or sensing circuit parameters to facilitate accurate data retrieval.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are placed closer together to increase storage density, then storage capacity is improved, but program disturb errors increase due to charge trapping between adjacent cells

Engineering Contradiction:

Improvestorage densityVSAvoiddata read accuracy

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a data recovery read operation before the normal read operation. This recovery read uses an elevated pass voltage to compensate for program disturb effects on neighboring word lines, thereby preemptively correcting threshold voltage shifts and enabling accurate data retrieval despite high-density cell placement

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent changes the pass voltage parameter from a nominal level to an elevated level during the data recovery read operation. This parameter change compensates for the program disturb effects caused by adjacent cell programming, allowing the system to maintain data read accuracy even when cells are densely packed

Inventive Principle:

Principle #35Parameter changes

2Ease of operation

If programming voltage is applied to adjacent word line to program memory cells, then programming function is achieved, but threshold voltage distribution of neighboring cells becomes disturbed

Engineering Contradiction:

Improveprogramming capabilityVSAvoidthreshold voltage distribution

Core Design Contradiction:

Ease of operationVSMeasurement precision

Solution Approach 1:

The patent applies preliminary anti-action by using an elevated pass voltage on the adjacent word line during a data recovery read operation. This counteracts the program disturb effects that occur when programming voltage is applied to neighboring cells, thereby preserving the threshold voltage distribution and enabling accurate data reading

Inventive Principle:

Principle #9Preliminary anti-action

3Duration of action of stationary object

If charge trapping layer is used to store data in 3D stacked memory, then non-volatile storage is achieved, but program disturb occurs due to charge injection between adjacent cells

Engineering Contradiction:

Improvedata retentionVSAvoidprogram disturb

Core Design Contradiction:

Duration of action of stationary objectVSObject-generated harmful factors

Solution Approach 1:

The patent converts the harmful program disturb effect into a beneficial outcome by using an elevated pass voltage during a data recovery read operation. This recovery read detects and compensates for charge injection effects between adjacent cells, thereby transforming the potential data corruption into an opportunity for error correction and ensuring accurate data retrieval

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables reliable reading of data affected by program disturb by correcting errors and improving read accuracy through ECC and elevated pass voltage techniques, ensuring data integrity in highly scaled 3D memory devices.

Implementation Method 1

program disturb issues due to charge trapping between adjacent cells

Methodology Applied

Scientific EffectCharge trapping: Electrostatic Induction

Data Source

PatentUS9552251B2Neighboring word line program disturb countermeasure for charge-trapping memory

Publication Date: 2017.01.24 SANDISK TECHNOLOGIES LLC

AI summary

Techniques for reading data from memory cells arranged along a common charge trapping layer. One example is in a 3D stacked non-volatile memory device. Memory cells on a word line layer WLLn can be disturbed by programming of memory cells on an adjacent word line layer WLLn+1, resulting in uncorrectable errors. The memory cells on WLLn are read in a data recovery read operation which applies an elevated pass voltage to WLLn+1. The elevated pass voltage decreases and narrows the threshold voltages on WLLn, which facilitates reading. The data recovery read operation compensates for the lower threshold voltages of the cells by lowering the control gate voltage, raising the source voltage or adjusting a sensing period, demarcation level or pre-charge level in sensing circuitry. The elevated pass voltage can be stepped up in repeated read attempts until there are no uncorrectable errors or a limit is reached.