Memory DQ Mapping Across Nibbles for ECC Fault Isolation
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Solution Overview
Problem
Existing memory devices face challenges with undetectable or uncorrectable errors and silent data corruption due to memory defects, which current error correction algorithms cannot address effectively.
Innovation Solution
Implementing DQ maps that minimize the likelihood of adjacent DQs failing together and isolate DQs across nibble boundaries, thereby increasing the probability of error detection and correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional DQ mappings are used in memory devices, then the memory device can operate with standard error correction algorithms, but silent data corruption and uncorrectable errors occur due to adjacent DQs failing together
Solution Approach 1:
The patent segments the data bus into nibbles (4-bit groups) and creates DQ mappings that distribute failures across nibble boundaries. By separating adjacent DQs into different nibbles, the system ensures that failures in one nibble do not propagate to others, enabling targeted error correction and reducing silent data corruption.
Solution Approach 2:
The patent introduces an intermediary mapping layer between the physical DQs and the error correction algorithm. This DQ mapping table acts as a mediator that translates physical DQ failures into corrected logical data, allowing standard ECC algorithms to handle failures that would otherwise be uncorrectable.
2Reliability
If DQ mappings are optimized to isolate failures across nibble boundaries, then error detection and correction probability increases, but the device complexity increases
Solution Approach 1:
The patent performs preliminary action by pre-configuring DQ mapping tables during device initialization or boot-up. These tables are prepared in advance with optimal mappings that isolate failures across nibble boundaries, eliminating the need for complex real-time calculations during data operations and reducing operational complexity.
Solution Approach 2:
The patent changes the parameter of DQ mapping configuration to optimize reliability. By adjusting the mapping parameters to distribute DQs across different nibbles, the system achieves higher error detection and correction probability without requiring fundamental changes to the underlying hardware architecture.
3Reliability
If advanced error correction algorithms are implemented to address memory defects, then reliability improves, but power consumption and device size increase
Solution Approach 1:
The patent creates a simplified copy of the error correction mechanism through DQ mapping tables rather than implementing complex algorithms. This mapping approach replicates the error correction function using simpler table lookups and data reassignment, reducing power consumption while maintaining effectiveness.
Solution Approach 2:
The patent extracts the error correction function from complex algorithms and isolates it into discrete DQ mapping operations. By separating the mapping configuration from the data path, the system achieves error correction with minimal additional power consumption, as the mapping tables are applied through simple signal routing changes.
Data Source
AI summary
Memory with DQ mappings based on fault boundary requirements are described herein. In one embodiment, a memory device includes a memory array having a plurality of column planes, bank control circuitry including a plurality of sub-wordline drivers, and data path circuitry including a plurality of data busses (DQs) and data routing circuitry. Each sub-wordline driver can be associated with at least one column plane of the plurality of column planes. Furthermore, the data routing circuitry can be configured to couple each DQ of the plurality of DQs to a respective one of the plurality of column planes in accordance with a DQ map such that (i) each column plane of the plurality of column planes is coupled to a only one DQ at a time and (ii) bit errors resulting from a failure of one of the plurality of sub-wordline drivers occur on two DQs of a same nibble.