Memory Driver Circuit DIBL Control via Source Pre-Charge

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Non-volatile memory devices, such as E2PROM, face inefficiencies in programming operations due to 'short-channel effects' like Drain-Induced Barrier Lowering (DIBL), leading to uncontrollable threshold voltage alterations and power wastage, especially in high-integration and high-programming applications.

Innovation Solution

A driver circuit design that maintains the second programming voltage equal to the first programming voltage during their respective transient periods, reducing the difference between bias voltages and preventing channel currents that cause DIBL, thereby controlling the programming process more effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the source terminal is biased at a high voltage to turn off the memory transistor during programming, then channel current is reduced, but the transient voltage difference between drain and source causes DIBL effect and uncontrollable threshold voltage alteration

Engineering Contradiction:
Improvechannel current power wastageVSAvoidthreshold voltage control precision
Core Design Contradiction:
Loss of energyVSManufacturing precision

Solution Approach 1:

The source terminal is pre-charged to a high voltage before the programming operation begins. This preliminary action ensures that when programming voltages are applied, the memory transistor is already in an off state, preventing DIBL effect and threshold voltage alteration during the programming transient period.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A counteracting voltage is applied to the source terminal in advance to compensate for the upcoming voltage difference between drain and source during programming. This preliminary anti-action prevents the DIBL effect from occurring by maintaining the transistor in an off state throughout the programming operation.

Inventive Principle:
Principle #9Preliminary anti-action

2Device complexity

If driver circuits use finite bandwidth to provide bias voltages, then the circuit complexity is reduced, but the transient response causes voltage differences that generate channel current

Engineering Contradiction:
Improvedriver circuit complexityVSAvoidchannel current power wastage
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The driver circuit pre-charges the source terminal to the target high voltage before the programming operation starts. This preliminary action compensates for the finite bandwidth limitation, ensuring that when programming voltages are applied, the source voltage has already reached its target value, preventing channel current generation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The driver circuit maintains continuous control over the source terminal voltage throughout the programming operation. By keeping the source voltage continuously adjusted to prevent voltage differences, the circuit ensures no channel current flows during the entire programming transient period.

Inventive Principle:
Principle #20Continuity of useful action

3Quantity of substance

If memory transistors are miniaturized for high integration, then device density is increased, but short-channel effects like DIBL become more limiting

Engineering Contradiction:
Improvememory cell densityVSAvoidprogramming operation reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The invention applies a localized solution by specifically controlling the source terminal voltage of affected memory transistors during programming operations. This local quality control prevents DIBL effect in miniaturized transistors without requiring changes to the overall transistor design or global circuit architecture.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention changes the voltage parameter of the source terminal dynamically during programming operations. By adjusting the source voltage to a high level before and during programming, the invention compensates for short-channel effects in miniaturized transistors, maintaining programming reliability despite reduced transistor dimensions.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces the DIBL effect, enhancing the controllability of programming operations and minimizing power wastage, even in applications requiring numerous programming cycles.

Implementation Method 1

A short-channel effect, known as 'Drain-Induced Barrier Lowering' (DIBL), implies that, because of the voltage difference between the drain terminal and the source terminal of the memory transistor, a channel current may still generate during the programming operation

Methodology Applied
Scientific EffectDrain-Induced Barrier Lowering (DIBL):

Implementation Method 2

during the programming operation, an injection of electric charges occurs within the floating gate for effect of a phenomenon called 'Fowler-Nordheim tunneling'; such technique provides for the formation of a strong electric field between the control gate and the drain terminal of the memory transistor

Methodology Applied
Scientific EffectFowler-Nordheim tunneling:

Data Source

PatentUS8619489B2Driving circuit for memory device
Publication Date: 2013.12.31 STMICROELECTRONICS SRL
  • US8619489B2 patent drawing
  • US8619489B2 patent drawing
  • US8619489B2 patent drawing

AI summary

An electrically programmable non-volatile memory device is proposed. The memory device includes a plurality of memory cells and a driver circuit for driving the memory cells; the driver circuit includes programming means for providing a first programming voltage and a second programming voltage to a set of selected memory cells for programming the selected memory cells; the first programming voltage requires a first transient period for reaching a first target value thereof. In the solution according to an embodiment of the present invention, the programming means includes means for maintaining the second programming voltage substantially equal to the first programming voltage during a second transient period being required by the second programming voltage to reach a second target value thereof.