Semiconductor Memory Driver Voltage Compensation
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in maintaining a stable core voltage level during normal driving due to over-driving, leading to fluctuations and increased current consumption, which affects the reliability of the circuit and requires costly and time-consuming tuning of transistor sizes and discharge times.
Innovation Solution
A semiconductor memory device that includes a driver for over-driving and normal driving with a drive voltage adjuster that detects the level of the over-drive voltage and compensates for changes in the normal drive voltage by adjusting the discharge time and selecting appropriate discharge intervals, ensuring the normal drive voltage is maintained at a target level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a power voltage VDD is supplied to the pull-up drive node to over-drive it, then the bit line pair can be rapidly sensed and amplified, but the core voltage VCORE level rises higher than the target value causing instability
Solution Approach 1:
The patent applies preliminary action by first supplying a power voltage VDD to the pull-up drive node to rapidly sense and amplify the bit line pair, then subsequently supplying a core voltage VCORE after the sensing is complete. This staged approach allows fast initial operation followed by stable normal operation.
Solution Approach 2:
The patent implements dynamics by making the drive voltage supply adaptive and time-dependent. The control circuit dynamically switches between power voltage VDD and core voltage VCORE based on the operational phase, allowing the system to optimize performance at different stages rather than using a fixed voltage supply.
2Manufacturing precision
If a discharge circuit is connected to forcibly drop the core voltage VCORE to the target level, then the voltage can be controlled, but the discharge amount is difficult to uniformly maintain due to transistor size variations
Solution Approach 1:
The patent applies feedback by using a control circuit that monitors the core voltage VCORE level and adjusts the discharge operation accordingly. The control circuit receives feedback about the voltage level and modulates the discharge timing and duration to achieve uniform voltage control despite transistor size variations.
Solution Approach 2:
The patent implements parameter changes by dynamically adjusting the discharge time and voltage levels based on detected conditions. The control circuit modifies operational parameters such as discharge duration and voltage magnitude to compensate for manufacturing variations and maintain consistent core voltage control.
3Reliability
If the size of the pull-down transistor is made large to discharge the core voltage, then the discharge effect is enhanced, but the core voltage falls lower than the target level causing ringing and increased current consumption
Solution Approach 1:
The patent applies partial action by using a pull-down transistor with optimized (not excessively large) size that provides sufficient discharge capability without over-discharging. The control circuit also applies partial discharge by controlling the discharge timing and duration to achieve the target voltage level without excessive discharge that would cause ringing and increased current consumption.
Data Source
AI summary
A semiconductor memory device having a driver configured to sequentially perform over-driving and normal driving operations is presented. The semiconductor memory device includes a driver that outputs a drive signal, that over-drives the drive signal with an over-drive voltage having a voltage level higher than a normal drive voltage, and then subsequently normally drives the drive signal with the normal drive voltage. The semiconductor memory device also includes a drive voltage adjuster that detects a level of the over-drive voltage and compensates for a change in the voltage level of the normal drive voltage in response to the detected level of the over-drive voltage.


