Memory Device Dummy Cell Programming for HCI Disturbance Reduction
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Solution Overview
Problem
Current memory devices face challenges in reducing chip size while maintaining efficient programming operations, particularly in managing channel potential differences that can lead to hot carrier injection (HCI) disturbances and requiring separate voltage generators for varying dummy word line voltages.
Innovation Solution
The implementation of a memory device with a cell string structure that includes a select transistor, memory cells, and dummy cells, where the dummy cells are programmed to have different threshold voltage distributions based on their location, allowing for the same dummy word line voltage to be applied across multiple dummy cells, thereby reducing chip size and minimizing HCI disturbances without the need for additional voltage generators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate voltage generators are used for varying dummy word line voltages, then hot carrier injection disturbances are prevented, but device complexity and chip size increase
Solution Approach 1:
The patent merges the voltage control function by applying a common voltage to multiple dummy word lines (DDL1, DDL2, DDL3) instead of using separate voltage generators for each. This consolidation reduces the number of voltage generators needed while maintaining reliable operation by preventing hot carrier injection disturbances through unified voltage management.
Solution Approach 2:
The patent implements a universal voltage application approach where a single voltage signal serves multiple dummy word lines simultaneously. This multi-functional voltage control mechanism eliminates the need for dedicated voltage generators for each dummy word line, reducing device complexity while ensuring all dummy cells are properly controlled to prevent HCI disturbances.
2Stability of the object's composition
If dummy cells are programmed with different threshold voltages, then channel potential stability is improved, but programming operation complexity increases
Solution Approach 1:
The patent applies local quality by programming dummy cells at different locations with different threshold voltage characteristics. Dummy cells closer to the select transistor are programmed with higher threshold voltages, while those farther away have lower threshold voltages. This localized differentiation stabilizes channel potential gradients without requiring complex global control mechanisms.
Solution Approach 2:
The patent performs preliminary programming of dummy cells with appropriate threshold voltage distributions before normal memory operations. This advance preparation establishes stable channel potentials that facilitate subsequent programming operations, reducing the complexity of real-time control during actual memory access operations.
3Area of stationary object
If chip size is reduced, then integration density increases, but channel potential control becomes more difficult
Solution Approach 1:
The patent changes the threshold voltage parameter of dummy cells based on their spatial location within the cell string. By adjusting threshold voltages of dummy cells (DDL1, DDL2, DDL3) according to their distance from the select transistor, the invention compensates for channel potential variations that occur in compact, high-density configurations, enabling effective channel control in reduced chip sizes.
Data Source
AI summary
A memory device includes a cell string, a peripheral circuit and a control logic. The cell string includes a select transistor and a plurality of memory cells, and further includes a plurality of dummy cells, wherein the plurality of dummy cells are coupled in series between the select transistor and the plurality of memory cells. The peripheral circuit configured to perform a dummy program operation on the plurality of dummy cells. The control logic configured to control the peripheral circuit so that the plurality of dummy cells have different threshold voltage distributions during the dummy program operation.