Nonvolatile Memory Dummy Cell Programming Isolation

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Solution Overview

Problem

Nonvolatile memory devices face challenges in programming selected dummy memory cells without affecting unselected dummy memory cells, due to undesired coupling and interference, which reduces data reliability and causes program disturb.

Innovation Solution

The implementation of a memory device with a memory cell array that includes memory blocks with memory strings containing dummy cells and select transistors, bit lines, select lines, and dummy word lines. A peripheral circuit applies specific voltages to the select lines and dummy word lines to isolate and program the selected dummy memory cell without affecting others.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a program voltage is applied to a selected dummy word line to program dummy memory cells, then the selected dummy memory cells are programmed, but unselected dummy memory cells on the same word line experience program disturb

Engineering Contradiction:
Improvedata reliabilityVSAvoidprogram disturb
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent segments the dummy word lines into first dummy word lines (adjacent to select lines) and second dummy word lines (not adjacent to select lines). Different programming strategies are applied to different segments: first dummy word lines are programmed while second dummy word lines are kept at bias voltage, preventing program disturb to unselected cells.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by differentiating the treatment of dummy word lines based on their spatial location relative to select lines. First dummy word lines adjacent to select lines receive program voltage, while other dummy word lines receive bias voltage, creating localized programming zones that prevent interference.

Inventive Principle:
Principle #3Local quality

2Reliability

If dummy memory cells are programmed to improve integration, then data retention is enhanced, but coupling and interference between cells increases

Engineering Contradiction:
Improvedata retentionVSAvoidcoupling and interference
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent segments the memory cell array and applies different voltage conditions to different segments. By separating first dummy word lines (programmed) from second dummy word lines (biased), the patent reduces coupling and interference between adjacent cells while maintaining integration benefits.

Inventive Principle:
Principle #1Segmentation

3Productivity

If multiple dummy memory cells on the same word line are programmed simultaneously, then programming efficiency is improved, but threshold voltage distribution consistency deteriorates

Engineering Contradiction:
Improveprogramming efficiencyVSAvoidthreshold voltage distribution consistency
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent segments dummy word lines into two categories and applies different programming approaches: first dummy word lines are programmed while second dummy word lines are biased. This segmentation allows efficient programming of selected cells while maintaining threshold voltage distribution consistency through controlled voltage application.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the voltage parameter applied to different dummy word lines: program voltage is applied to first dummy word lines while bias voltage is applied to second dummy word lines. This parameter differentiation enables efficient programming while maintaining consistent threshold voltage distribution.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250069665A1Memory device, system and method of operating the same
Publication Date: 2025.02.27 YANGTZE MEMORY TECH CO LTD
  • US20250069665A1 patent drawing
  • US20250069665A1 patent drawing
  • US20250069665A1 patent drawing

AI summary

A memory device includes a memory block including memory strings, bit lines coupled to the memory strings, dummy word lines coupled to the dummy cells, first select lines coupled to the first select transistors, and a peripheral circuit coupled to the bit lines, the dummy word lines, and the first select lines. Each of the memory strings includes memory cells, first select transistors, and dummy cells. The peripheral circuit is configured to apply a turn on voltage on the first select lines, and apply a program voltage on a first dummy word line of the dummy word lines to program all dummy cells coupled to the first dummy word line.