3D Memory Dummy Plug Layout to Prevent Word Line Bridging
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Solution Overview
Problem
The bridge phenomenon between word lines in three-dimensional non-volatile memory elements occurs due to metal material remaining in lower holes during the formation of dummy plugs, which affects the reliability and yield of the semiconductor device manufacturing process.
Innovation Solution
The solution involves forming a semiconductor device with a structure that includes alternately stacked interlayer insulating and conductive patterns, where channel plugs are vertically formed through both stacks, and a dummy plug is placed in the outermost corner region of the channel plug arrangement, ensuring it does not pass through the lower stack, thereby avoiding the formation of lower holes and reducing metal residue.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dummy plug is formed by passing through the lower stack, then the dummy plug can be properly formed in the upper stack, but metal material remains in the lower hole causing bridge phenomenon between word lines
Solution Approach 1:
The patent extracts the harmful element (lower hole formation) from the dummy plug fabrication process. By forming the dummy plug only in the upper stack without penetrating through the lower stack, the process eliminates the source of metal residue that causes bridge phenomenon between word lines, while still achieving the necessary dummy plug function in the upper stack region.
2Manufacturing precision
If the dummy plug structure is simplified to avoid lower stack penetration, then metal residue is reduced, but the dummy plug may not provide sufficient structural support or electrical isolation
Solution Approach 1:
The patent applies local quality by forming the dummy plug only in the upper stack where it is needed for electrical isolation and structural support, without extending into the lower stack. This localized approach provides sufficient dummy plug functionality in the critical upper region while avoiding the harmful effects of lower stack penetration, achieving both manufacturing precision and reliability.
Data Source
AI summary
The present technology relates to a semiconductor device and a method of manufacturing the same. The semiconductor device includes a first stack including first interlayer insulating layers and first conductive patterns which are alternately stacked with one another, a second stack including second interlayer insulating layers and second conductive patterns which are alternately stacked with one another on the first stack, a plurality of channel plugs vertically formed through the first stack and the second stack, and at least one dummy plug vertically formed through the second without passing through the first stack.