Semiconductor Memory Dummy Word Line Voltage Control
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Solution Overview
Problem
Conventional semiconductor memory devices experience miswrites and Source Side Injection (SSI) issues when operating in sub block mode, particularly due to voltage applied to unselected sub blocks during repeated programming operations.
Innovation Solution
The semiconductor memory device employs a control circuit to apply specific voltages to word lines and a dummy word line, where the unselected sub block voltage is set lower than the selected sub block voltage, and the dummy word line voltage is set higher than the unselected sub block voltage to inhibit miswrites and SSI.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If voltage VPASS_usel is applied to word lines in unselected sub block during program execution, then program operation can be performed on selected sub block, but miswrite occurs in unselected sub block due to voltage accumulation
Solution Approach 1:
The memory device divides the block into multiple sub-blocks (selected sub-block and unselected sub-block) that can be independently managed. This segmentation allows program operations to be performed on one sub-block while applying different voltage levels to word lines in other sub-blocks, thereby preventing miswrite in unselected sub-blocks during program execution.
Solution Approach 2:
Different voltage levels are applied to different regions (sub-blocks) based on their operational status. The control circuit applies voltage VPASS_sel to selected sub-block word lines during program operations, while applying lower voltage VPASS_usel to unselected sub-block word lines, creating local quality differentiation that prevents miswrite in unselected areas.
2Reliability
If voltage difference between selected and unselected sub blocks is increased to prevent miswrite, then miswrite is reduced, but Source Side Injection occurs from unselected to selected sub block
Solution Approach 1:
The patent optimizes the voltage parameters by applying a specific voltage level (VPASS_usel) to unselected sub-block word lines that is lower than the selected sub-block voltage but not excessively low. This parameter adjustment prevents both miswrite in unselected sub-blocks and Source Side Injection to selected sub-blocks by finding the optimal voltage difference.
Solution Approach 2:
The control circuit acts as an intermediary that carefully manages voltage distribution across different sub-blocks. It mediates between the need to prevent miswrite in unselected sub-blocks and the need to prevent Source Side Injection, by applying appropriately controlled voltage levels to different word line groups based on their operational status.
Data Source
AI summary
A semiconductor memory device includes: a memory cell array including a plurality of bit lines, a source line, a plurality of NAND strings, a first and a second sub block, a first word line group included in the first sub block, a second word line group included in the second sub block, and a dummy word line located between the first and second sub blocks; and a control circuit capable of applying predetermined voltages to the first word line group, the second word line group, and the dummy word line. When a specific word line belonging to the first word line group is selected for the execution of a write operation, a voltage higher than voltages applied to an unselected word line belonging to the first word line group and the second word line group is applied to the dummy word line.