Memory Device Dynamic Verify Voltage Control

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Solution Overview

Problem

Current memory devices face challenges in maintaining reliable data storage due to variations in threshold voltage distribution during programming operations, which can lead to reduced reliability and increased errors.

Innovation Solution

The proposed solution involves a memory device with a peripheral circuit that performs multiple program loops, each including the application of a program voltage and verify operations using incrementally adjusted verify voltages based on target program states, and control logic to manage these voltages, ensuring accurate programming and data retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If verify voltages are kept constant across program loops, then the programming process is simple, but threshold voltage distribution deteriorates and reliability decreases

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidverify voltage control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The verify voltage is changed dynamically across program loops rather than remaining constant. The control logic adjusts the verify voltage level in each subsequent program loop based on the number of program loops executed, creating a dynamic verification process that adapts to the programming state and improves threshold voltage distribution.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The verify voltage parameter is systematically changed across program loops. The control logic modifies the verify voltage level based on the program loop count, transforming a static parameter into a variable one that evolves during the programming process to maintain reliable data storage.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If multiple verify voltages are applied for each program loop, then programming accuracy improves, but operation time increases

Engineering Contradiction:
Improveprogramming accuracyVSAvoidprogram operation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

Instead of applying all verify voltages in every program loop, the method applies verify voltages selectively. The control logic determines which verify voltages to apply based on the current program loop number, using partial verification actions that are sufficient for the programming stage but reduce overall operation time.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The verification process is segmented across different program loops. Different verify voltages are applied at different stages of programming, dividing the verification task into manageable segments that correspond to specific program loop phases, thereby improving accuracy without requiring all verify voltages to be applied simultaneously or in every loop.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11468956B2Memory device and method of operating the same
Publication Date: 2022.10.11 SK HYNIX INC
  • US11468956B2 patent drawing
  • US11468956B2 patent drawing
  • US11468956B2 patent drawing

AI summary

The present disclosure relates to a memory device that includes a plurality of memory cells. The memory device also includes a peripheral circuit configured to perform a program operation of storing data in the plurality of memory cells, which includes a plurality of program loops each including an operation of applying a program voltage to a selected word line commonly connected to the plurality of memory cells and a verify operation of applying at least one verify voltage among verify voltages respectively corresponding to target program states of the plurality of memory cells. The memory device additionally includes control logic configured to control the peripheral circuit so that the at least one verify voltage increases according to a program loop of the plurality of program loops during the program operation.