Memory ECC Layer Redistribution for Bad Column Compensation

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Solution Overview

Problem

Bad columns in non-volatile memory devices, such as NAND memory, result from manufacturing defects, leading to data integrity issues, reduced yield, and increased production costs due to the uneven distribution of defects across the memory array, which previous uniform ECC application strategies fail to address efficiently.

Innovation Solution

The memory controller dynamically redistributes ECC layers across the memory device based on defect densities, allocating more layers to areas with higher defects and fewer layers to less affected areas, enhancing error correction efficiency without compromising data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If uniform ECC layers are applied across all memory columns, then the memory device structure is simple and manufacturing is easy, but data integrity deteriorates due to inability to compensate for bad columns

Engineering Contradiction:
Improvedata integrityVSAvoidECC distribution structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies different numbers of ECC layers to different memory columns based on their defect characteristics. Good columns receive standard ECC protection while bad columns receive enhanced ECC protection, creating local quality variations that optimize data integrity without uniformly increasing complexity across the entire device.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The memory device is segmented into good columns and bad columns based on defect detection. This segmentation allows the system to apply differentiated ECC strategies to each segment, improving overall reliability by targeting protection resources where they are most needed rather than applying uniform protection throughout.

Inventive Principle:
Principle #1Segmentation

2Reliability

If ECC layers are increased to compensate for bad columns, then data integrity improves, but manufacturing cost increases due to uniform ECC application

Engineering Contradiction:
Improvedata integrityVSAvoidproduction cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Instead of uniformly increasing ECC layers across the entire memory device, the system applies enhanced ECC protection only to bad columns where defects exist. This localized approach improves data integrity in affected areas while avoiding the unnecessary cost increase that would result from uniform ECC application throughout the device.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system applies partial ECC enhancement only where needed (in bad columns) rather than excessive uniform protection across all columns. This partial action approach optimizes manufacturing cost by providing enhanced protection only to the extent necessary to compensate for actual defects.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If more ECC layers are allocated to bad columns, then error correction efficiency improves, but device complexity increases

Engineering Contradiction:
Improveerror correction efficiencyVSAvoidECC layer distribution
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system implements local quality differentiation by allocating additional ECC layers specifically to bad columns where error correction is most needed. This localized enhancement improves error correction efficiency in affected areas while maintaining simpler ECC structures in good columns, thereby managing overall device complexity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The ECC layer allocation is made dynamic rather than static, allowing the system to adapt ECC protection levels based on the specific characteristics of each column. This dynamic allocation optimizes error correction efficiency by matching protection resources to actual defect conditions while managing complexity through flexible configuration.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12625764B2Memory device bad column identification and compensation
Publication Date: 2026.05.12 MICRON TECHNOLOGY INC
  • US12625764B2 patent drawing
  • US12625764B2 patent drawing
  • US12625764B2 patent drawing

AI summary

A method for managing error correction in a memory device includes identifying, by a memory controller, codewords in a memory array of the memory device that have bad columns. The method includes calculating, by the memory controller, an increased Error Correction Code (ECC) layer for each identified codeword based on a number of errors introduced by the bad columns. The method also includes redistributing, by the memory controller, ECC layers from one or more other codewords that have extra ECC layers to increase the ECC layers for the identified codewords with bad columns to enable implementation of the redistributed ECC layers on each codeword in the memory array.