Semiconductor Memory ECC with Direct Uncorrectable Error Signaling
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in promptly notifying and addressing uncorrectable errors, which can lead to malfunctions, especially in critical systems like vehicles, where timely detection and correction of errors are essential for safety and reliability.
Innovation Solution
A semiconductor memory element with an integrated error detection and correction circuit that includes an uncorrectable error detection part, capable of transmitting an uncorrectable error signal to the outside via a dedicated terminal, allowing for immediate notification and processing of abnormalities, such as using an ECC circuit and an uncorrectable error detector to identify and signal errors beyond correction capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an ECC circuit is used to detect and correct errors in memory data, then error correction capability is improved, but the ability to promptly notify uncorrectable errors deteriorates
Solution Approach 1:
The error detection and correction function is segmented into two independent parts: the ECC circuit for correctable errors and a separate uncorrectable error detection circuit for uncorrectable errors. This segmentation allows each part to operate independently and notify their respective error types without interference, resolving the contradiction by enabling both error correction and prompt uncorrectable error notification simultaneously.
Solution Approach 2:
A dedicated uncorrectable error detection circuit acts as an intermediary between the memory cell and the external system. This intermediary circuit specifically monitors for uncorrectable errors and provides direct notification through a dedicated signal line, bypassing the limitations of the ECC circuit and ensuring prompt notification while maintaining error correction capabilities.
2Reliability
If a dedicated terminal for uncorrectable error signal is added to the semiconductor memory element, then error notification capability is improved, but device complexity increases
Solution Approach 1:
The semiconductor memory element is designed with multi-functionality by integrating both error correction (ECC) and uncorrectable error detection functions within a single device structure. The dedicated terminal for uncorrectable error signals serves as a universal notification interface that can indicate various types of uncorrectable errors without requiring separate terminals for each error type, thus improving notification capability while limiting complexity increase.
3Measurement precision
If an uncorrectable error detection circuit is integrated into the semiconductor memory element, then error detection capability is improved, but manufacturing complexity increases
Solution Approach 1:
The uncorrectable error detection circuit is merged with the existing memory cell and ECC circuit structure to form an integrated error management system. By combining these functions in a unified circuit design, the patent achieves improved error detection capability while minimizing manufacturing complexity through shared fabrication processes and integrated circuit techniques.
Data Source
AI summary
The disclosure provides a semiconductor storage element which is provided with an error detection and correction circuit and, when an uncorrectable error occurs in the semiconductor storage element, capable of promptly transferring the occurrence to the outside, and provides a semiconductor storage device and a system-on-chip using the same. The semiconductor storage element includes a storage part storing data, an error detection and correction part detecting an error in the data stored in the storage part and correcting the error if possible, a monitoring part issuing an uncorrectable error signal when an uncorrectable error occurs in the error detection and correction part, and a terminal transmitting the uncorrectable error signal to the outside.