Nonvolatile Memory Erase Control Using GIDL String Selection

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Solution Overview

Problem

Existing nonvolatile memory devices face challenges in improving threshold voltage distribution and erase efficiency, particularly in flash memory-based storage devices, which affect the reliability and performance of storage solutions like eMMC, UFS, and SSDs.

Innovation Solution

The implementation of a nonvolatile memory device with ferroelectric material-based memory cells and a method utilizing Gate Induced Drain Leakage (GIDL) for selective erase operations, allowing for improved threshold voltage distribution and erase efficiency through incremental step pulse programming and bidirectional scatter collection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional erase operations are used in nonvolatile memory devices, then erase functionality is provided, but threshold voltage distribution is degraded and erase efficiency is limited

Engineering Contradiction:
Improvethreshold voltage distributionVSAvoiderase efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies different voltage parameters to different string selection lines during erase operations. Specifically, it uses a first erase voltage on a first string selection line and a second erase voltage (different from the first) on a second string selection line. This parameter differentiation enables bidirectional threshold voltage control, improving threshold voltage distribution while maintaining high erase efficiency through selective voltage application.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements localized erase operations by applying specific voltages to selected string selection lines while applying different voltages to unselected string selection lines. This local quality approach allows precise control over which memory strings are erased, improving both threshold voltage distribution for selected cells and overall erase efficiency by avoiding unnecessary operations on unselected cells.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If selective erase operations are implemented on smaller units, then erase precision is improved, but device complexity increases

Engineering Contradiction:
Improveerase selectivityVSAvoidcontrol circuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the erase operation control by providing separate string selection lines for different string groups (first string selection line for first string group, second string selection line for second string group). This segmentation enables independent control of erase operations on different strings, achieving high erase selectivity while managing complexity through modular voltage control architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements multi-functional string selection lines that can serve both selection and erase control purposes. The same string selection lines used for normal operation are also utilized for controlling erase voltages, reducing the need for additional dedicated control lines and thereby limiting the increase in device complexity despite enhanced selectivity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances erase inhibition efficiency and improves threshold voltage distribution by enabling selective erase operations on smaller units such as cells, strings, or planes, thereby improving the reliability and performance of storage devices.

Implementation Method 1

applying a Gate Induced Drain Leakage (GIDL) voltage to at least one string selection line corresponding to a selected string from among the plurality of strings

Methodology Applied
Scientific EffectGate Induced Drain Leakage (GIDL):

Implementation Method 2

each of the plurality of memory cells having a ferroelectric material

Methodology Applied
Scientific EffectFerroelectric polarization:

Data Source

PatentUS12614577B2Nonvolatile memory device, storage device having the same, and operating method thereof
Publication Date: 2026.04.28 SAMSUNG ELECTRONICS CO LTD
  • US12614577B2 patent drawing
  • US12614577B2 patent drawing
  • US12614577B2 patent drawing

AI summary

A method of operating a nonvolatile memory device includes applying a ground voltage to a selected wordline among the wordlines, applying an erase pass voltage to at least one unselected wordline among the wordlines, applying an erase voltage to a selected bitline among the bitlines, applying an erase prohibition voltage to an unselected bitline among the bitlines, and applying a Gate Induced Drain Leakage (GIDL) voltage to at least one string selection line corresponding to a string selected from among the plurality of strings.