3D Nonvolatile Memory Erase Screening for Word Line Leakage
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Solution Overview
Problem
In three-dimensional memory devices, not-open strings can occur due to process errors, leading to unreliable data storage and the need for a technique to detect and address these defects effectively.
Innovation Solution
A method involving a memory controller that counts erase operations, issues a first erase command when a reference value is reached, applies a specific voltage to detect leakage current, and determines a word line as failed if the leakage current exceeds a threshold, allowing for the identification and management of defective word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If three-dimensional memory device with high integration is used to accommodate large data sizes, then storage capacity is improved, but not-open strings occur due to process errors leading to data reliability degradation
Solution Approach 1:
The patent applies preliminary action by performing fail detection through leakage current measurement before data programming operations. The memory controller counts erase operations, issues a first erase command when a reference value is reached, applies a voltage to cause a gate-source potential difference, and detects leakage current to identify not-open strings before they cause data reliability issues. This preventive approach allows the system to maintain high storage capacity while ensuring data reliability by marking defective memory blocks as unprogrammable in advance.
2Ease of manufacture
If conventional erase operations are performed without detection, then manufacturing simplicity is maintained, but leakage current from not-open strings causes uncorrectable errors
Solution Approach 1:
The patent introduces an intermediary detection mechanism between the erase operation and data programming. The memory controller acts as an intermediary by counting erase operations, issuing a first erase command when a reference value is reached, and applying a detection voltage to measure leakage current. This intermediary step identifies not-open strings through leakage current measurement without requiring complex manufacturing changes, preventing uncorrectable errors while maintaining manufacturing simplicity.
3Measurement precision
If voltage is applied to detect leakage current, then not-open strings can be identified, but additional voltage application steps increase operational complexity
Solution Approach 1:
The patent applies periodic action by implementing fail detection at specific intervals based on erase operation counts. The memory controller counts erase operations and issues a first erase command when a reference value is reached, rather than performing continuous detection. This periodic approach maintains high measurement precision for identifying not-open strings while reducing operational complexity by limiting voltage application to predetermined intervals based on erase counts.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the detection and prevention of uncorrectable errors by identifying and marking defective memory blocks, ensuring reliable data storage and preventing data programming on faulty lines.
Implementation Method 1
a row decoder including a pass transistor configured to switch a plurality of word lines connected to the plurality of memory cells
Implementation Method 2
detecting, by the memory controller, a leakage current in a word line, after the applying of the first voltage; and determining, by the memory controller, the word line as a fail when a leakage voltage caused by the leakage current is greater than a first threshold value
Data Source
AI summary
A fail detecting method of a memory system including a nonvolatile memory device and a memory controller, the fail detecting method including: counting, by the memory controller, the number of erases of a word line connected to a pass transistor; issuing a first erase command, by the memory controller, when the number of erases reaches a reference value; applying a first voltage, by the nonvolatile memory device, in response to the first erase command, that causes a gate-source potential difference of the pass transistor to have a first value; detecting, by the memory controller, a leakage current in a word line, after the applying of the first voltage; and determining, by the memory controller, the word line as a fail when a leakage voltage caused by the leakage current is greater than a first threshold value.