In-Memory Error Reporting for Faster Memory Processing

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Solution Overview

Problem

The communication speed bottleneck between memory devices and host devices in memory systems is exacerbated by the lack of error detection in in-memory processing operations, leading to potential errors in calculation results that are not recognized by the host device.

Innovation Solution

A memory device with an in-memory processor that includes an error report circuit to provide error records to the host device, allowing for error detection and reporting during in-memory processing operations, with options for immediate reporting or deferred reporting based on a report level setting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the in-memory processor stores calculation results in internal registers without returning to host, then processing speed is improved, but error detection capability deteriorates

Engineering Contradiction:
Improveprocessing speedVSAvoiderror detection capability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements an error report circuit that provides feedback to the host device about calculation errors occurring in the in-memory processor. This feedback mechanism allows the host to detect errors without requiring the processor to return intermediate results, thus maintaining high processing speed while improving error detection capability.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The error report circuit acts as an intermediary between the in-memory processor and the host device. It monitors calculation operations and communicates error status to the host independently, allowing the processor to maintain its internal register storage while the host receives error information through this intermediate channel.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If error records are immediately reported to host device, then error detection is improved, but data transmission volume increases

Engineering Contradiction:
Improveerror detectionVSAvoiddata transmission volume
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

Instead of reporting all calculation results or only reporting errors for every operation, the patent implements selective error reporting. The error report circuit monitors operations and only transmits error records when actual errors occur, avoiding unnecessary data transmission while maintaining error detection capability.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If the host device continues operation without error recognition, then productivity is maintained, but calculation accuracy deteriorates

Engineering Contradiction:
Improveoperation continuityVSAvoidcalculation accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The error report circuit provides real-time feedback to the host device about calculation errors. When an error is detected, the host receives notification and can take appropriate corrective actions, ensuring calculation accuracy while maintaining operational productivity through immediate error awareness.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20260074005A1Memory device and operation method thereof
Publication Date: 2026.03.12 SAMSUNG ELECTRONICS CO LTD
  • US20260074005A1 patent drawing
  • US20260074005A1 patent drawing
  • US20260074005A1 patent drawing

AI summary

A memory device configured to receive a processing command from an external host device may be provided. The memory device may comprise an in-memory processor configured to perform an in-memory processing operation in response to the processing command, and an error report circuit configured to provide, in response to the processing command, one or more error records indicating errors detected during the in-memory processing operation, to the external host device in response to the processing command.