Memory Fabrication Using Segmented Protective Layers
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Solution Overview
Problem
The conventional self-aligned contact (SAC) process for memory fabrication faces complications due to differing spacer thickness requirements between memory and periphery regions, leading to spacer damage and substrate deterioration during material removal, which affects electrical insulation and device characteristics.
Innovation Solution
A method involving a first material layer covering the memory region and a barrier layer covering the periphery region, with selective removal and patterning to form contact openings, ensuring protection and maintaining spacer integrity, thereby preventing damage and enhancing electrical insulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the material of the second spacers is filled into the openings between the gates in the memory region simultaneously for convenience of process, then the fabrication process is simplified, but the first spacers in the memory region are damaged during removal and fail to provide superior electrical insulation
Solution Approach 1:
The patent divides the processing regions into memory region and periphery region, and divides the material layers into first material layer (for memory region) and second material layer (for periphery region). This segmentation allows independent processing of each region with appropriate protection strategies, resolving the contradiction by enabling simplified periphery processing while protecting memory region structures.
Solution Approach 2:
The first material layer acts as an intermediary protective layer between the gates in the memory region and the processing operations. By introducing this intermediate protective layer, the patent enables convenient processing in the periphery region while preventing damage to the memory region structures, thus resolving the contradiction between process simplicity and structural integrity.
2Productivity
If the second spacers are removed after source and drain region is formed in the periphery region, then the periphery region processing is completed, but the removal conditions damage the substrate in the periphery region and lead to deterioration of device characteristics
Solution Approach 1:
The second material layer is designed as a disposable protective layer that is removed after serving its protective function during periphery region processing. This allows aggressive removal conditions to be used without damaging the substrate, as the second material layer sacrificially protects the underlying structures during removal operations.
Solution Approach 2:
The second material layer is formed in advance before the removal operations are performed. This preliminary protective action enables subsequent aggressive processing to be carried out safely, resolving the contradiction between completing processing and maintaining device characteristics by preparing protection beforehand.
3Manufacturing precision
If different thicknesses of spacers are required for memory region and periphery region devices, then the specific requirements of each region are met, but the process becomes more complicated
Solution Approach 1:
The patent applies local quality by forming different material layers with different thicknesses in different regions. The first material layer provides the required spacer thickness for memory region devices, while the second material layer provides the required thickness for periphery region devices. This local differentiation achieves precise thickness control for each region without requiring complex global process adjustments.
Solution Approach 2:
By segmenting the spacer formation process into separate first and second material layers for different regions, the patent achieves region-specific thickness precision. The segmentation allows each region to be processed independently with optimized parameters, resolving the contradiction between precision requirements and process complexity by breaking down the unified process into manageable regional steps.
Data Source
AI summary
A method of fabricating a memory is provided. A substrate including a memory region and a periphery region is provided. A plurality of gates each having spacers is formed on the substrate. A plurality of openings is formed between the gates in the memory region. A first material layer is formed in the memory region to cover the gates and fill the openings. A barrier layer is formed on the substrate to cover the gates in the periphery region and the first material layer in the memory region. A second material layer is formed on the substrate in the periphery region to cover the barrier layer in the periphery region. The barrier layer covering the first material layer is removed. The first material layer is partially removed to form a plurality of second openings. Each second opening is disposed on a top of the gate in the memory region.