Memory Fault Tolerant Reference Circuitry
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Solution Overview
Problem
Existing memory circuits in embedded applications with large logic components face increased costs due to separate processing requirements for memory and logic, and there is a need for reliable memory solutions that do not require extra processing, especially for applications with small but critical memory size needs.
Innovation Solution
The implementation of memory circuits that utilize redundant cells and references, with each bit having two references for redundancy, allowing for parallel operation of primary and redundant cells with multiple references to ensure reliability and detect defects before programming, thereby reducing the likelihood of failure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundant cells and references are implemented, then memory reliability is improved, but device complexity increases
Solution Approach 1:
The memory circuit is divided into multiple independent segments: primary cells, redundant cells, and multiple reference circuits. Each segment can function independently, allowing the system to maintain reliability even if one segment fails. The sense amplifier also operates in segmented mode by selectively comparing different cell configurations based on test results.
Solution Approach 2:
Redundant cells and additional reference circuits are built into the memory structure beforehand to compensate for potential failures. The redundant cells are prepared in advance and can be activated if the primary cells fail, providing a cushion against unrecoverable failures. Multiple references ensure that even if one reference is defective, the memory can still operate correctly.
2Reliability
If multiple references are used for each bit, then reliability is improved, but manufacturing complexity increases
Solution Approach 1:
Multiple reference circuits are merged into a single integrated structure that shares common elements such as the sense amplifier and control logic. The reference circuits are designed to be interchangeable and can be manufactured using the same process, simplifying production while maintaining the redundancy needed for high reliability.
3Reliability
If redundant cells are implemented, then reliability is improved, but the likelihood of uncorrectable failures increases
Solution Approach 1:
The sense amplifier provides feedback by comparing the state of primary and redundant cells and determining which configuration is correct. This feedback mechanism allows the system to automatically correct errors by switching to the healthy redundant cells, preventing uncorrectable failures from occurring.
Data Source
AI summary
A memory not only uses redundant cells but also redundant references to reduce the likelihood of a failure. In one approach a failure in a reference can cause both the primary cell as well as the redundant cell to be ineffective. To overcome this potential problem two references for each bit are employed. In one form, the primary cell of a first bit is compared to one reference and the redundant cell of the first bit is compared to another reference. The primary and redundant cell of a second bit can use these two references as well. In another aspect, two references are placed in parallel for both the primary and redundant cell of the bit.


