3D Nonvolatile Memory Device Hot Carrier Injection Reduction
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Solution Overview
Problem
Nonvolatile memory devices face disturbances during programming operations due to hot-carrier injection (HCI), which degrades the threshold voltage distribution of memory cells and affects the overall performance of the device.
Innovation Solution
A programming method for nonvolatile memory devices that involves applying a first inhibition voltage to non-selected word lines connected to memory cells above the selected cell and a second inhibition voltage to non-selected word lines connected to memory cells below the selected cell, with the second inhibition voltage being applied after a predetermined delay, and controlling the levels and rise timings of these voltages to minimize channel potential differences and reduce HCI.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a program voltage is applied to a selected word line during programming operation, then the selected memory cell can be programmed, but hot-carrier injection occurs in non-selected memory cells causing threshold voltage distribution degradation
Solution Approach 1:
The patent applies different inhibition voltages to different regions of non-selected word lines based on their position relative to the selected word line. Specifically, a first inhibition voltage is applied to non-selected word lines in a first region and a second inhibition voltage is applied to non-selected word lines in a second region, creating localized voltage conditions that prevent HCI in different areas while allowing efficient programming of the selected cell
Solution Approach 2:
The patent dynamically changes voltage parameters during the programming operation. It applies a first inhibition voltage initially, then after a predetermined time period, switches to a second inhibition voltage for certain non-selected word lines. This time-dependent parameter change optimizes the balance between programming efficiency and HCI prevention at different stages of the operation
2Reliability
If inhibition voltages are applied to all non-selected word lines simultaneously, then HCI disturbance is reduced, but programming time increases due to extended operation duration
Solution Approach 1:
The patent applies a first inhibition voltage to non-selected word lines before completing the programming of the selected cell. This preliminary inhibition prevents HCI disturbance from occurring in the first place during the programming process, rather than attempting to correct it afterward, thereby maintaining reliability without significantly extending the overall programming time
Solution Approach 2:
The patent uses time-periodic voltage application by switching from a first inhibition voltage to a second inhibition voltage after a predetermined time period. This periodic adjustment of inhibition voltages maintains effective HCI prevention while allowing the programming operation to complete within an optimized time frame
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces disturbance caused by HCI, improving the programming performance and maintaining the integrity of the threshold voltage distribution in nonvolatile memory devices.
Implementation Method 1
A programming method to reduce hot-carrier injection (HCI) occurring in the channel of memory cells
Data Source
AI summary
A nonvolatile memory device for reducing hot-carrier injection (HCI) and a programming method of the nonvolatile memory device, the programming method of the nonvolatile memory device includes programming memory cells included in a cell string in a direction from an upper memory cell adjacent to a string selection transistor to a lower memory cell adjacent to a ground selection transistor from among a plurality of memory cells; when a selected memory cell is programmed, applying a first inhibition voltage to first non-selected word lines connected to first non-selected memory cells located over the selected memory cell; and applying a second inhibition voltage to second non-selected word lines connected to second non-selected memory cells located under the selected memory cell when a predetermined delay time elapses after the first inhibition voltage is applied.