3D Memory Hole Oxide Thickness for Stable Threshold Window
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices face challenges in achieving a wide threshold voltage window due to variations in memory hole diameter, leading to difficulties in reliable operation and increased risk of read disturb.
Innovation Solution
The semiconductor memory device employs a stacked structure with a tunnel insulating member thickness that varies based on the memory hole diameter, with thicker layers at smaller diameters and thinner layers at larger diameters, utilizing a specific oxidation process to form the tunnel insulating member, ensuring self-alignment with the memory hole shape and curvature.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a uniform tunnel insulating member thickness is used across all memory holes, then the manufacturing process is simpler, but the threshold voltage window becomes narrow and read disturb increases due to diameter variations
Solution Approach 1:
The patent applies local quality by making the tunnel insulating member thickness position-dependent. Memory holes with smaller diameters receive thicker tunnel insulating members, while larger diameter holes receive thinner members. This localized adjustment compensates for diameter variations and stabilizes the threshold voltage window across different memory hole sizes.
Solution Approach 2:
The patent changes the thickness parameter of the tunnel insulating member based on the memory hole diameter. By adjusting this critical parameter according to the specific geometry of each memory hole, the system achieves consistent electrical performance despite structural variations.
2Reliability
If the tunnel insulating member thickness is increased for smaller diameter memory holes, then the threshold voltage window stabilizes, but the manufacturing complexity increases
Solution Approach 1:
The patent employs self-service through self-aligned oxidation processes. The tunnel insulating member is formed by oxidizing a sacrificial layer in situ within each memory hole, allowing the thickness to automatically adjust according to the hole diameter without requiring external measurement or manual intervention. The process self-regulates based on the local geometry.
Solution Approach 2:
The patent replaces mechanical measurement and adjustment systems with a chemical oxidation process. Instead of mechanically measuring each memory hole diameter and manually adjusting the insulating layer thickness, the system uses oxidation chemistry that naturally produces the desired thickness variation based on the underlying geometry.
3Object-affected harmful factors
If a thicker tunnel insulating member is used, then read disturb is reduced, but the electric field concentration efficiency decreases
Solution Approach 1:
The patent applies local quality by making the tunnel insulating member thickness position-dependent. Memory holes with smaller diameters receive thicker tunnel insulating members, while larger diameter holes receive thinner members. This localized adjustment compensates for diameter variations and stabilizes the threshold voltage window across different memory hole sizes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach stabilizes the threshold voltage window, reduces read disturb, and allows for efficient operation by concentrating the electric field effectively, thereby enhancing the overall performance of the memory device.
Implementation Method 1
utilizing a specific oxidation process to form the tunnel insulating member, ensuring self-alignment with the memory hole shape and curvature
Data Source
AI summary
According to one embodiment, a semiconductor memory device includes a stacked body including a plurality of electrode members and a plurality of insulating members, each of the electrode members and each of the insulating members being stacked alternately in a first direction on the substrate. The semiconductor memory device also includes a memory hole that extends in the stacked body in the first direction and a semiconductor member that is disposed to extend in the memory hole in the first direction. The semiconductor memory device also includes a memory member that is disposed between the semiconductor member and the plurality of electrode members. The plurality of electrode members including a first electrode member and a second electrode member, a thickness of the memory member at the position of the first electrode member being greater than a thickness of the memory member at the position of the second electrode member.