In Situ Memory Re-Programming via Hole Pre-Charge

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Solution Overview

Problem

NAND memory devices face challenges in efficiently re-programming data without inducing program disturb, especially when dealing with word lines that have a high failed bit count due to leakage, as existing methods can cause unintentional programming in neighboring cells during the pre-charge operation.

Innovation Solution

The method involves a 'hole pre-charge' operation where a low voltage is applied to all word lines to make memory cells conductive to holes, and a weak erase voltage is applied to the source line to inject gate-induced drain leakage (GIDL) holes, allowing for re-programming of selected word lines without disturbing adjacent cells, thereby avoiding program disturb.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional pre-charge operation is applied to re-program word lines with high failed bit counts, then the memory cells can be re-programmed, but program disturb occurs in neighboring cells causing unintentional programming

Engineering Contradiction:
Improvere-programming successVSAvoidprogram disturb
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies different voltage levels to different word lines during the pre-charge operation. Specifically, a first voltage level is applied to the selected word line to be re-programmed, while a second, lower voltage level is applied to non-selected word lines. This localized voltage differentiation allows the selected cell to be properly pre-charged for re-programming while preventing program disturb in neighboring cells, thus resolving the contradiction between re-programming success and preventing harmful side effects.

Inventive Principle:
Principle #3Local quality

2Object-generated harmful factors

If data is moved to another memory block for re-programming, then program disturb is avoided, but device complexity and operation time increase

Engineering Contradiction:
Improveprogram disturb preventionVSAvoiddata relocation complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent extracts and isolates the pre-charge operation for the selected word line from the conventional block-wide pre-charge process. By separating the voltage application to the selected word line from the non-selected word lines, the method eliminates the need to move data to another memory block while still preventing program disturb. This extraction of the problematic element (high voltage pre-charge) from the broader context resolves both the program disturb issue and avoids the complexity of data relocation.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of operation

If a conventional pre-charge voltage is applied to all word lines, then all memory cells are properly pre-charged, but neighboring cells experience program disturb

Engineering Contradiction:
Improvepre-charge operationVSAvoidunintentional programming
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The patent implements local quality by applying different voltage levels to different spatial locations (word lines) within the memory block. The selected word line receives a first voltage level sufficient for proper pre-charge, while non-selected word lines receive a second, lower voltage level that prevents program disturb. This spatial differentiation of voltage quality maintains ease of operation for the target cell while eliminating harmful effects in neighboring cells.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables in-situ re-programming of memory cells with high failed bit counts without moving data to another memory block, improving performance and extending the device's operating life by eliminating the need for a program-erase cycle, while preventing program disturb in neighboring cells.

Implementation Method 1

a weak erase voltage is applied to the source line to inject gate-induced drain leakage (GIDL) holes

Methodology Applied
Scientific EffectGate-induced drain leakage (GIDL):

Data Source

PatentUS20240363178A1In situ data refresh without erase/program cycles
Publication Date: 2024.10.31 SANDISK TECHNOLOGIES LLC
  • US20240363178A1 patent drawing
  • US20240363178A1 patent drawing
  • US20240363178A1 patent drawing

AI summary

The memory device includes a memory block with a plurality of memory cells that are arranged in a plurality of word lines and in a plurality of channels. The memory device also includes circuitry that is configured to conduct a hole pre-charge operation to inject holes into the plurality of channels. The hole pre-charge operation includes applying a first voltage to the plurality of word lines to make the plurality of memory cells conductive to holes and applying a voltage to the channels from one side of the memory block to inject holes into the channels.