Differential Programming Circuit for Two-Terminal Memory Identifier Bits

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Solution Overview

Problem

Existing resistive-switching memory technologies face challenges in efficiently programming multiple two-terminal memory cells without causing invalid data results and reducing power consumption, particularly in detecting program events and disconnecting cells from the voltage source in a timely manner.

Innovation Solution

The implementation of differential programming methods that allow for concurrent application of a program cycle to multiple memory cells, detecting a program event in one cell, and disconnecting all cells from the program supply voltage before the cycle completes, along with intrinsic suppression of non-programmed cells to prevent invalid data and reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a program cycle is applied to multiple memory cells concurrently, then programming efficiency is improved, but invalid data results may occur due to uncontrolled programming of individual cells

Engineering Contradiction:
Improveprogramming efficiencyVSAvoiddata validity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements program detection circuitry that continuously monitors the state of memory cells during concurrent programming. When a program event is detected in any cell, the system provides feedback to terminate the program cycle, preventing invalid data results while maintaining high programming efficiency through parallel operation of multiple cells.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies preliminary disconnection action by immediately disconnecting the voltage source from all memory cells upon detecting a program event in any single cell. This preliminary action prevents further programming that would create invalid data states, ensuring data validity while allowing concurrent programming to proceed efficiently.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the program cycle duration is extended to ensure complete programming of all cells, then programming thoroughness is improved, but power consumption increases due to prolonged voltage application

Engineering Contradiction:
Improveprogramming thoroughnessVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies partial programming action by terminating the program cycle as soon as any single cell completes programming, rather than forcing all cells to complete the full program cycle duration. This partial action approach ensures adequate programming of the first completed cell while significantly reducing unnecessary power consumption from prolonged voltage application to other cells.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent implements rushing through the program cycle by immediately disconnecting the voltage source upon detecting a program event, rather than allowing the full programmed cycle duration to elapse. This skipping of the remaining cycle time maintains programming effectiveness for the completed cell while dramatically reducing power consumption.

Inventive Principle:
Principle #21Skipping (Rushing through)

Data Source

PatentUS12154624B2Differential programming of two-terminal memory with program detection and multi-path disablement
Publication Date: 2024.11.26 CROSSBAR INC
  • US12154624B2 patent drawing
  • US12154624B2 patent drawing
  • US12154624B2 patent drawing

AI summary

Improved differential programming of multiple two-terminal memory cells that define an identifier bit is provided. Differential programming can apply a program cycle to multiple memory cells concurrently, detect a program event for one (or a first group) of the memory cells and disconnect all of the memory cells from a program supply voltage in response to detecting the program event. Moreover, disconnecting the memory cells can be accomplished prior to a duration of the program cycle, serving to mitigate an invalid data result for the identifier bit, as well as reduce power consumption associated with the differential programming. Circuits providing intrinsic suppression of a non-programmed memory cell(s) defining an identifier bit in response to programming of another memory cell (or group of cells) defining the identifier bit are included. Differential programming can reduce power consumption and mitigate or avoid invalid data results for an identifier bit.