Memory Interface Circuit With Adaptive Termination and Signal Amplitude
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in efficiently managing signal amplitudes and terminating circuits to optimize data transmission and reception, particularly in NAND flash memory systems, leading to inefficiencies in data transfer and processing.
Innovation Solution
The implementation of a semiconductor memory device with a first pin receiving multiple signals of varying amplitudes, a first receiving circuit for signal comparison, and a first terminating circuit that is enabled or disabled based on the received signal type, allowing for adaptive voltage adjustments and optimized signal termination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a terminating circuit is always enabled to reduce signal interference, then signal quality improves, but data transfer efficiency deteriorates due to unnecessary termination overhead
Solution Approach 1:
The patent implements a dynamic terminating circuit that can be selectively enabled or disabled based on the type of signal being transmitted. The control circuit determines whether to activate termination based on signal characteristics, allowing the system to adapt between different operational modes (data transfer mode with termination disabled vs. signal quality mode with termination enabled), thereby resolving the contradiction between always maintaining signal quality and always maximizing transfer efficiency
2Measurement precision
If signal amplitude is increased to improve detection accuracy, then measurement precision improves, but energy consumption increases
Solution Approach 1:
The patent employs parameter changes by dynamically adjusting the amplitude of received signals based on the detected signal type. The control circuit identifies whether a signal is a command, address, or data signal, and then applies appropriate amplitude adjustments - enhancing amplitude for signals requiring high detection accuracy while maintaining lower amplitude for other signals, thus optimizing the balance between detection precision and energy consumption
3Adaptability or versatility
If multiple signals with different amplitudes are received on a single pin, then adaptability improves, but device complexity increases due to additional receiving circuits
Solution Approach 1:
The patent implements a universal receiving circuit design where a single pin and associated receiving circuitry can handle multiple types of signals (commands, addresses, data) with different amplitude requirements. The control circuit acts as a multi-functional element that identifies signal types and directs appropriate processing, allowing one receiving circuit to serve multiple purposes rather than requiring separate dedicated circuits for each signal type
Data Source
AI summary
A memory system includes a semiconductor memory device; and a memory controller configured to control the semiconductor memory device. The semiconductor memory device includes a first pin configured to receive a first signal and a second signal sent from the memory controller, the second signal having a smaller amplitude than the first signal. A first receiving circuit is connected to the first pin and is configured to output a third signal and a fourth signal having a smaller amplitude than the third signal. The first receiving circuit outputs the third signal based on a comparison between the first signal and a first voltage, and outputs the fourth signal based on a comparison between the second signal and a second voltage. A first terminating circuit is connected to the first pin and is configured to be disabled if the first pin receives the first signal and enabled if the first pin receives the second signal.