Memory Interface Logic for Bus Width Constrained Access
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Solution Overview
Problem
Existing memory and integrated circuit communication systems are limited by the physical size and layout of memory devices, restricting bus width and efficiency in signal communication, which hinders effective memory access and testing.
Innovation Solution
The integration of application logic and memory interface logic on an integrated circuit to perform memory access functions, allowing for the generation and decoding of memory access signals, and communication with a separate memory device using a bus with multiple conductors, enabling pre-decoded address signals to access memory arrays efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memory devices include logic circuits to conform to standardized communication protocols, then communication compatibility is improved, but device complexity increases
Solution Approach 1:
The patent extracts the communications protocol logic from the memory device and places it on a separate integrated circuit. This separation reduces the complexity of the memory device while maintaining communication compatibility, as the protocol handling functions are removed from the memory device's internal structure.
Solution Approach 2:
The system is divided into distinct functional components: the memory device focuses on memory operations, while the integrated circuit handles communications protocol logic. This segmentation allows each component to be optimized independently, reducing overall system complexity while maintaining adaptability.
2Ease of manufacture
If the bus width is limited by the physical size and layout of the memory device, then manufacturing constraints are reduced, but communication efficiency deteriorates
Solution Approach 1:
The integrated circuit acts as an intermediary between the application logic and the memory device. It handles protocol communications and generates memory access signals, allowing the memory device to be accessed efficiently without being constrained by bus width limitations imposed by its physical layout.
3Adaptability or versatility
If logic functions are performed on the memory device, then communication protocol handling is improved, but the integrated circuit's functionality is reduced
Solution Approach 1:
The communications protocol logic is extracted from the memory device and implemented on a separate integrated circuit. This allows the integrated circuit to handle protocol communications while the memory device focuses on memory operations, creating a more modular and manageable system architecture.
Data Source
AI summary
A configurable memory system and method is wherein an integrated circuit coupled to a memory device includes application logic and memory interface logic in communication with the application logic, the memory interface logic configured to access a memory array within the memory device. The memory interface logic provides logic functions and/or signals that would have been provided by logic on a prior art memory device. The interface logic may access the memory device synchronously or asynchronously. The integrated circuit may communicate to the memory device using multiplexed or non-multiplexed signals.