Memory Interface Redundant Data Strobe Scheme

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Solution Overview

Problem

Existing memory systems face reliability issues in data communication due to the failure of data strobe paths, which are typically uncorrectable by conventional error correction methods, leading to impaired data transfer when dedicated strobe paths fail.

Innovation Solution

Implementing a redundant data strobe scheme where multiple data strobe transfer paths are shared among multiple data transfer paths, allowing for the selection and use of alternative strobe paths in case of failure, and utilizing latch circuits to sample data signals with selected strobe signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dedicated data strobe transfer paths are used for each data transfer path, then data transfer reliability is improved, but device complexity and resource utilization deteriorate

Engineering Contradiction:
Improvedata transfer reliabilityVSAvoidinterface circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Multiple data transfer paths share common data strobe transfer paths instead of having dedicated strobe paths for each data path. The interface circuit combines strobe signal generation and distribution to reduce the number of separate transfer paths while maintaining reliable data transfer through shared infrastructure.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Data strobe transfer paths are designed to serve multiple data transfer paths simultaneously. A single data strobe transfer path can be dynamically allocated to different data paths based on operational needs, increasing resource utilization while maintaining system reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple data strobe transfer paths are shared among data transfer paths, then resource utilization is improved, but reliability deteriorates when strobe paths fail

Engineering Contradiction:
Improveresource utilizationVSAvoiddata transfer reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The interface circuit implements dynamic path selection capability where data strobe transfer paths can be selectively activated or deactivated based on operational status. When a shared strobe path fails, the system dynamically reallocates resources and switches to alternative paths, maintaining reliability while preserving high resource utilization during normal operation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system pre-configures multiple alternative data strobe transfer paths and maintains them in standby状态. When a primary shared path fails, pre-prepared alternative paths are immediately activated, cushioning against reliability deterioration while allowing efficient resource utilization during normal operation.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If error check and correction schemes are implemented, then data transfer reliability is improved, but device complexity deteriorates

Engineering Contradiction:
Improvedata transfer reliabilityVSAvoidinterface circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary error check and correction circuit that sits between the data transfer paths and the memory interface. This intermediary layer handles error detection and correction centrally, improving reliability without requiring complex error handling logic in each individual data path, thus limiting the increase in overall device complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10692566B2Interface method of memory system, interface circuitry and memory module
Publication Date: 2020.06.23 SAMSUNG ELECTRONICS CO LTD
  • US10692566B2 patent drawing
  • US10692566B2 patent drawing
  • US10692566B2 patent drawing

AI summary

A memory system may comprise a plurality of data strobe transfer paths assigned to a plurality of data transfer paths such that each of the plurality of data strobe transfer paths may be shared by the plurality of data transfer paths. At least one selected data strobe transfer path is selected and data signals transferred through the plurality of data transfer paths are sampled using at least one data strobe signal transferred through the selected data strobe transfer path. Reliability of data communication is enhanced through a redundant data strobe scheme by assigning a plurality of data strobe transfer paths to a plurality of data transfer paths such that the plurality of data strobe transfer paths may be shared by the plurality of data transfer paths.