Memory Interface with Unidirectional Ports for Concurrent Read Write
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Solution Overview
Problem
Existing memory devices face challenges in efficiently managing concurrent read and write operations due to turnaround delays and complex buffering and scheduling logic, which hinder latency reduction and pin frequency optimization.
Innovation Solution
Implementing integrated circuit memory devices with unidirectional ports that separate input and output operations, allowing concurrent interface operations without turnaround delays, and utilizing separate input and output pins for read and write transfers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If bidirectional ports are used for memory operations, then pin reuse and device integration are improved, but turnaround delays occur and concurrent read/write operations cannot be performed
Solution Approach 1:
The patent segments the interface into separate unidirectional input ports and output ports. Input ports are dedicated to receiving commands and write data, while output ports are dedicated to transmitting read data. This segmentation eliminates the need for bidirectional switching and allows concurrent operations without turnaround delays.
2Adaptability or versatility
If bidirectional ports with drivers and receivers are used, then functionality is improved, but port capacitance increases and pin frequency is limited
Solution Approach 1:
The interface is segmented into dedicated unidirectional ports. Input ports contain only receivers without drivers, and output ports contain only drivers. This reduces the capacitance at each port compared to bidirectional ports that must accommodate both drivers and receivers, thereby enabling higher pin frequencies.
3Adaptability or versatility
If complex buffering and scheduling logic is implemented to manage concurrent operations, then operation flexibility is improved, but device complexity and latency increase
Solution Approach 1:
The patent segments the interface into dedicated unidirectional ports, which inherently simplifies the buffering and scheduling logic. Input ports handle commands and write data separately from output ports that handle read data, eliminating the need for complex bidirectional arbitration and scheduling mechanisms.
4Loss of time
If separate unidirectional ports are used for concurrent operations, then latency is reduced and pin frequency is increased, but pin count and interface complexity increase
Solution Approach 1:
The interface is segmented into separate unidirectional ports, allowing concurrent read and write operations to proceed simultaneously without interference. This segmentation reduces latency by eliminating turnaround delays and simplifies the control logic despite increasing the physical pin count.
Data Source
AI summary
Technologies for concurrent interface operations of integrated circuit memory devices are described. An integrated circuit memory device includes an input port, a control port, and an output port. The input port receives interleaved input and a first timing reference. The interleaved input includes one or more commands or write data. The control port receives one or more control signals that specify that the interleaved input is the one or more commands or the write data. The output port transmits read data and a second timing reference. The commands or write data can be received concurrently with transmitting the read data.