Memory I/O Circuit Strobe Signal Blocking for Power Reduction

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Solution Overview

Problem

Semiconductor memory devices face challenges in reducing power consumption, particularly in managing data strobe signals to optimize energy usage during data transfer operations.

Innovation Solution

The implementation of an input/output circuit that receives and processes data strobe signals based on a chip selection signal, allowing for the selective blocking of data strobe signals when a semiconductor memory device is not selected, thereby reducing power consumption by preventing unnecessary data transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If data strobe signals are continuously received and processed, then data transfer capability is maintained, but power consumption increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddata transfer capability
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The input/output circuit dynamically switches between two operational states: a first state where data strobe signals are received and processed normally, and a second state where data strobe signals are blocked. The circuit transitions to the second state when the memory device is not selected and to the first state when selected, enabling adaptive power consumption based on actual operational needs while maintaining data transfer capability when required

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The circuit periodically alternates between receiving and blocking data strobe signals based on selection status. During unselected periods, the circuit blocks data strobe signals to reduce power consumption. During selected periods, the circuit resumes normal data strobe signal processing. This periodic switching between operational modes optimizes the balance between power consumption and data transfer capability

Inventive Principle:
Principle #19Periodic action

2Loss of energy

If data strobe signals are blocked when device is not selected, then power consumption is reduced, but data transfer is prevented

Engineering Contradiction:
Improveenergy efficiencyVSAvoiddata transfer reliability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The input/output circuit incorporates feedback mechanisms through selection status signals that indicate whether the memory device is currently selected. Based on this feedback, the circuit automatically adjusts its operational state - blocking data strobe signals when unselected to save energy, and enabling them when selected to ensure reliable data transfer. This feedback-driven control ensures that energy savings are achieved without compromising data transfer reliability when the device is actively used

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The input/output circuit autonomously manages its own power consumption by self-adjusting the reception and processing of data strobe signals based on its selection status. When the memory device is not selected, the circuit automatically blocks data strobe signals to reduce power consumption. When selected, it automatically resumes normal operation. This self-service capability eliminates the need for external control while ensuring both energy efficiency and operational reliability

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8971135B2Semiconductor memory device receiving data in response to data strobe signal, memory system including the same and operating method thereof
Publication Date: 2015.03.03 SK HYNIX INC
  • US8971135B2 patent drawing
  • US8971135B2 patent drawing
  • US8971135B2 patent drawing

AI summary

A semiconductor memory device includes an input/output circuit configured to receive an address and data from an exterior, and a peripheral circuit configured to receive the address through the input/output circuit and generate a chip selection signal based on the address. The input/output circuit may include a control pad circuit configured to apply or block at least one data strobe signal in response to the chip selection signal, and one or more input/output pad circuits configured to transfer the data to the peripheral circuits in response to the at least one data strobe signal.