Semiconductor Memory Leakage Detection via Clock Pulse Counting

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Solution Overview

Problem

Current semiconductor memory devices lack an effective method to detect and manage leakage currents in word lines, which can lead to inefficient operation and data loss due to unutilized memory blocks identified as 'bad' due to excessive leakage.

Innovation Solution

A semiconductor memory device and method that includes a switching controller, voltage generator, and control logic to detect leakage current by counting pulses of a clock signal, comparing reference and target clock numbers to determine if a memory block is experiencing excessive leakage, and categorizing memory blocks based on leakage levels to manage them effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If leakage current detection is not implemented, then memory blocks can be used without restriction, but data loss occurs due to excessive leakage in unmonitored blocks

Engineering Contradiction:
Improvedata integrityVSAvoiddetection system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a charge pump as an intermediary device that converts leakage current measurements into clock signal pulse counts. The charge pump receives clock signals and generates output pulses whose frequency is proportional to the leakage current, enabling indirect measurement without direct complex sensing circuits in the memory blocks themselves

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces direct electrical measurement of leakage current with a temporal measurement approach. Instead of measuring current directly with complex analog circuits, the system converts leakage current into a frequency domain signal (clock pulses) that can be measured by simple digital counters, substituting electrical measurement with temporal/signal processing measurement

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If all memory blocks are monitored for leakage, then reliability improves, but device complexity and measurement difficulty increase

Engineering Contradiction:
Improvememory block reliabilityVSAvoidleakage current measurement difficulty
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent divides the memory system into independently monitorable units (memory blocks with local word lines). Each block can be individually tested by isolating its local word line and measuring leakage separately, allowing systematic monitoring of multiple blocks without overwhelming complexity. The segmentation enables parallel or sequential testing of individual blocks

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The charge pump serves as a mediator that simplifies the measurement process for each memory block. By converting leakage current into clock pulse frequencies, it provides a standardized interface for measuring leakage across different blocks, making the measurement process uniform and manageable

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If reference current comparison is used to identify bad blocks, then bad blocks can be isolated, but productivity decreases due to reduced usable memory capacity

Engineering Contradiction:
Improvememory system reliabilityVSAvoidusable memory capacity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs preliminary leakage current measurements and comparisons during manufacturing or initialization phases. By identifying bad blocks beforehand through reference current comparison, the system can create a map of usable blocks before actual memory operations begin. This preliminary characterization allows the memory system to operate at full capacity using only verified good blocks, rather than losing capacity during normal operation

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10886003B2Semiconductor memory device, operating method thereof, and memory system
Publication Date: 2021.01.05 SK HYNIX INC
  • US10886003B2 patent drawing
  • US10886003B2 patent drawing
  • US10886003B2 patent drawing

AI summary

A semiconductor memory device includes a switching controller, a voltage generator and control logic. The switching controller is connected to a local word line. The voltage generator, connected to the switching controller, is configured to generate an operating voltage according to an input clock signal and transfer the operating voltage to the switching controller. The control logic is configured to control operations of the voltage generator and the switching controller. The control logic is configured to detect an amount of leakage current of the local word line by counting a number of pulses of the input clock signal.