Memory Management Data Stability Verification

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Solution Overview

Problem

Conventional techniques for managing information in multi-level memory devices often require complex circuitry, which may not be suitable for all memory devices or systems, leading to potential corruption of data during operations.

Innovation Solution

A memory management system that includes a control unit and interface, allowing for the retrieval and storage of information in memory cells with different configurations (e.g., 2-bit, 3-bit, 4-bit per cell) by updating management information only after data stability is confirmed, thereby preventing data corruption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional techniques are used to prevent corruption of information during memory operations, then data reliability is improved, but device complexity increases due to complex circuitry and control requirements

Engineering Contradiction:
Improvedata reliabilityVSAvoidcircuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by storing management information (such as valid bit maps, erase counters, and location mappings) in a separate management portion of the memory device before actual data operations occur. This pre-stored management data enables the control unit to track and verify data integrity without requiring complex real-time circuitry during write, read, or erase operations, thus improving reliability while maintaining simplicity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces management information as an intermediary between the control unit and the stored data. This management information acts as a mediator that records the state and location of data, allowing the control unit to verify data integrity and prevent corruption without direct complex interaction with the data storage cells themselves, thereby reducing circuitry complexity while maintaining reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If management information is updated immediately during data operations, then operational speed is improved, but data corruption risk increases due to potential power interruptions or disturbances

Engineering Contradiction:
Improveoperational speedVSAvoiddata integrity
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-storing management information in a separate management portion before data operations commence. This management information includes pre-calculated valid bit maps, erase counters, and location mappings that enable rapid data verification without requiring real-time updates during operations, thus maintaining both speed and integrity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements beforehand cushioning by maintaining separate, pre-stored management information that serves as a backup reference during data operations. If power interruption or disturbance occurs during an operation, the control unit can revert to this pre-stored management information to recover and verify data integrity, cushioning against potential corruption while allowing fast operations to proceed

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS9916899B2Storing information and updating management data in non-volatile memory
Publication Date: 2018.03.13 MICRON TECHNOLOGY INC
  • US9916899B2 patent drawing
  • US9916899B2 patent drawing
  • US9916899B2 patent drawing

AI summary

Some embodiments include apparatuses and methods having memory cells and a control unit. The control unit can retrieve information from a first portion of the memory cells. The information can include bits organized into a first bit group and second bit group. The information can be associated with management information. The control unit can store the first and second bits in the second group in a second portion of the memory cells. The control unit can update the first and second management information after the second bit group is stored.