Memory Module Coupling Using Compression Springs
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Solution Overview
Problem
Current memory module coupling solutions for mobile computing devices increase the dimensions of the host device's motherboard, limit device size reduction, and require cut-outs, restricting configurability and increasing costs.
Innovation Solution
A memory module coupling solution with a reduced form factor that uses compression springs with elastic properties as electrical contacts, allowing for secure coupling and conductive connection without adding height to the motherboard, enabling multiple memory channels to be routed without increasing connector length or reducing pin pitches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional memory module coupling solutions are used, then reliable electrical connection is achieved, but the vertical height of the coupling component increases and cut-outs are required in the motherboard
Solution Approach 1:
The electrical contacts are nested within the receiving housing, with the housing receiving and containing the contacts. This nesting arrangement allows the coupling component to achieve reliable electrical connection while minimizing its vertical height profile, as the contacts are housed within rather than extending beyond the housing boundaries.
Solution Approach 2:
The patent transitions from traditional horizontal pin arrangements to a vertical compression spring contact mechanism. The elastic contacts compress vertically to establish electrical connection, changing the dimension of contact force application from horizontal insertion to vertical compression, thereby reducing the horizontal footprint and eliminating cut-out requirements.
2Productivity
If multiple memory channels are supported, then memory bandwidth is increased, but the connector length must be increased or pin pitches reduced
Solution Approach 1:
The memory module is divided into multiple independent memory channel segments, each with its own electrical contacts and routing paths. This segmentation allows multiple memory channels to be supported through parallel independent connections rather than requiring a single long connector, thereby increasing memory bandwidth without proportionally increasing connector length.
Solution Approach 2:
The receiving housing and electrical contact structure is designed to universally support multiple memory channel connections through a single standardized interface. The multi-channel capability is achieved through the housing's ability to receive and organize multiple contact sets, providing universal support for expanded memory bandwidth requirements without requiring proportional increases in connector length.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution reduces the vertical height of the memory module coupling component, eliminating the need for cut-outs, supporting multiple channels, and allowing for more efficient memory module design, thereby reducing component costs and enabling single-sided board designs.
Implementation Method 1
uses compression springs with elastic properties as electrical contacts, allowing for secure coupling and conductive connection
Data Source
AI summary
Embodiments of the invention describe a motherboard PCB having a memory bus to receive signal data from a channel of memory chips/devices of a memory module. Electrical contacts, communicatively coupled to the memory bus, securely couple the PCB to the memory chips/devices of the memory module. Embodiments of the invention further include a receiving housing that includes said electrical contacts and has a height less or equal to the height of the memory module. Embodiments of the invention further describe a memory module having a memory card housing, first and second pluralities of memory chips/devices included in the housing, and first and second pluralities of memory module electrical EO terminals for coupling the first and second pluralities of memory chips/devices to PCB, respectively. In embodiments of the invention, the above described first and second pluralities electrical EO connectors are disposed on different sides of the housing.