Memory Module Interface Chip Adapting to Bus Width via Interposer

Solution Overview

Problem

Existing memory modules require replacement of IO chips and interposer substrates to match different data bus widths, leading to increased manufacturing costs and inefficiencies.

Innovation Solution

A memory module design where a memory core chip is placed between an interface chip and an interposer chip, with the interposer chip transmitting type-information to the interface chip via relay wires, allowing the interface chip to control the memory core chip based on its type, eliminating the need for chip replacements when data bus widths change.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the IO chip is replaced together with the interposer substrate in accordance with the data bus width, then the data bus width compatibility is improved, but the manufacturing cost increases

Engineering Contradiction:
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The interposer substrate is designed to support multiple data bus widths (4-bit, 8-bit, etc.) through a universal structure with pad electrodes arranged to accommodate different bus configurations. This allows a single interposer substrate to serve multiple functions across different memory module specifications, eliminating the need for separate substrates for each bus width and thereby reducing manufacturing costs while maintaining adaptability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of manufacture

If the IO chip is fixed to a specific data bus width, then the manufacturing process is simplified, but the adaptability to different memory chip types is reduced

Engineering Contradiction:
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The IO chip incorporates dynamic configuration capability through software or hardware controls that allow it to adapt its operational parameters to match different data bus widths and memory chip types. This dynamic adaptability enables a single IO chip design to work with multiple memory chip configurations without requiring physical replacement or complex manufacturing variations, thus maintaining manufacturing simplicity while enhancing adaptability.

Inventive Principle:
Principle #15Dynamics

3Reliability

If through-electrodes are provided in the IO chip, then signal transmission capability is improved, but the manufacturing complexity increases

Engineering Contradiction:
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interposer substrate acts as an intermediary between the IO chip and the memory chips, providing the through-electrode functionality at the substrate level rather than requiring through-electrodes within the IO chip itself. This mediation allows the IO chip to maintain a simpler structure while still achieving reliable signal transmission through the interposer's through-electrode network, thereby reducing IO chip manufacturing complexity while preserving signal transmission capability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS7564127B2Memory module that is capable of controlling input/output in accordance with type of memory chip
Publication Date: 2009.07.21
  • US7564127B2 patent drawing
  • US7564127B2 patent drawing
  • US7564127B2 patent drawing

AI summary

A memory module of the present invention is provided with a memory core chip that is placed between an interface chip and an interposer chip and has a relay wire for electrically connecting these chips, an interposer chip that transmits type-information, that is information showing the type of the memory core chip, to the interface chip through the relay wire, and the interface chip that controls the memory core chip in accordance with the type-information received from the interposer chip.