Memory Multiplexer Reducing High-Voltage Transistor Area

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Solution Overview

Problem

Existing memory multiplexers for RRAMs require a large number of high-voltage devices, which occupy significant area due to their larger size compared to core voltage devices, hindering efficient area utilization.

Innovation Solution

A multiplexer design that uses only two high-voltage transistors per string, along with a plurality of low-voltage transistors, and employs a high voltage control unit to drive the high-voltage transistors and a low voltage control unit to drive the low-voltage transistors, optimizing area usage by sharing source-lines among multiple bit-lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If dedicated high-voltage devices are used for repetitive structures to enable set/form and read operations, then the memory can perform high-voltage operations, but the area occupied by the multiplexer increases significantly

Engineering Contradiction:
Improvehigh-voltage operation capabilityVSAvoidmultiplexer area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the functionality of multiple high-voltage transistors into a single shared high-voltage transistor that serves multiple bit-lines. Instead of allocating dedicated high-voltage devices to each bit-line, the invention combines their control functions, allowing one high-voltage transistor to switch multiple bit-lines simultaneously through a demultiplexer structure, thereby reducing the total number of high-voltage devices and occupied area

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single shared high-voltage transistor performs multiple functions by controlling different bit-lines at different times. The demultiplexer routes the high-voltage signal to the appropriate bit-line based on control signals, enabling the same physical transistor to serve multiple logical purposes and support operations on different memory cells across various bit-lines

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If the number of high-voltage devices is reduced to minimize area, then area utilization improves, but the complexity of voltage control and transistor arrangement increases

Engineering Contradiction:
Improvemultiplexer areaVSAvoidtransistor arrangement complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent segments the control functionality into separate low-voltage transistors for each bit-line while using a shared high-voltage transistor. Each low-voltage transistor handles the control logic for its specific bit-line, while the high-voltage transistor handles only the voltage switching function. This segmentation separates complex control logic from simple voltage switching, reducing overall design complexity despite the reduced number of high-voltage devices

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11562789B2Multiplexer for memory
Publication Date: 2023.01.24 INFINEON TECHNOLOGIES AG
  • US11562789B2 patent drawing
  • US11562789B2 patent drawing
  • US11562789B2 patent drawing

AI summary

In an example, a multiplexer is provided. The multiplexer may include one or more first strings controlling access to source-lines of the memory, wherein a first string of the one or more first strings includes a first set of two high voltage transistors and a first plurality of low voltage transistors. The multiplexer may include one or more second strings controlling access to bit-lines of the memory, wherein a second string of the one or more second strings includes a second set of two high voltage transistors and a second plurality of low voltage transistors. A method for operating such multiplexer is provided.