In-Memory Bit-Vector Multiplication Using Embedded Sensing Circuits

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Solution Overview

Problem

Existing memory devices require significant power and time to perform multiplication operations, as they often need to transfer data between memory arrays and processing resources, leading to inefficiencies in computation and power consumption.

Innovation Solution

The implementation of sensing circuitry within memory arrays that enables multiplication operations on bit-vectors stored in memory cells without transferring data via I/O lines, allowing for parallel processing and reduced power consumption by performing operations like AND, OR, and SHIFT directly within the memory array.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is transferred between memory arrays and processing resources to perform multiplication operations, then the operations can be executed using functional units, but power consumption increases and computational time increases

Engineering Contradiction:
Improvecomputational speedVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent merges the memory array and processing resources into a single integrated structure where sensing circuitry is embedded within the memory array. This allows multiplication operations to be performed directly on data stored in memory cells without transferring data between separate memory and processing components, thereby reducing power consumption while maintaining high computational speed through parallel processing.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory array performs multiplication operations on its own stored data using embedded sensing circuitry, eliminating the need for external processing resources. The sensing circuitry utilizes the stored data itself as operands for multiplication operations, enabling the memory system to serve its own computational needs without data transfer overhead.

Inventive Principle:
Principle #25Self-service

2Productivity

If data is transferred between memory arrays and processing resources, then multiplication operations can be performed using functional units, but the time required for data transfer increases computational delay

Engineering Contradiction:
Improveoperation throughputVSAvoiddata transfer time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

By merging the processing functionality into the memory array structure, the patent eliminates the data transfer step between memory and processing resources. The sensing circuitry embedded within the memory array directly accesses stored data and performs multiplication operations in place, removing the time delay associated with data transfer while maintaining high operation throughput through parallel processing capabilities.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The sensing circuitry acts as an intermediary component within the memory array that enables direct computation on stored data. Rather than transferring data to external processing resources, the sensing circuitry mediates the multiplication operation by utilizing the stored data as operands and producing results directly within the memory array, thereby eliminating data transfer time.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If sensing circuitry is integrated within the memory array to perform operations directly, then power consumption and computational time are reduced, but device complexity increases

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidmemory array structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The sensing circuitry is designed to serve multiple functions: traditional data sensing operations and multiplication operations. By making the sensing circuitry multi-functional, the patent reduces the need for separate dedicated processing components, thereby limiting the increase in device complexity while achieving improved computational efficiency through in-memory multiplication operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10409555B2Multiplication operations in memory
Publication Date: 2019.09.10 MICRON TECHNOLOGY INC
  • US10409555B2 patent drawing
  • US10409555B2 patent drawing
  • US10409555B2 patent drawing

AI summary

Examples of the present disclosure provide apparatuses and methods for performing multi-variable bit-length multiplication operations in a memory. An example method comprises performing a multiplication operation on a first vector and a second vector. The first vector includes a number of first elements stored in a group of memory cells coupled to a first access line and a number of sense lines of a memory array. The second vector includes a number of second elements stored in a group of memory cells coupled to a second access line and the number of sense lines of the memory array. The example multiplication operation can include performing a number of AND operations, OR operations and SHIFT operations without transferring data via an input/output (I/O) line.