Multi-Tier Memory Openings With Rounded Joints for 3D NAND
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Solution Overview
Problem
Current three-dimensional NAND stacked memory devices face challenges in forming efficient memory openings with rounded joint structures, which affect the integrity and performance of memory stack structures.
Innovation Solution
A method involving the formation of alternating stacks of insulating and sacrificial material layers, followed by the creation of inter-tier dielectric layers and memory openings, where sacrificial fill structures are selectively removed to form memory opening fill structures with specific geometries, including rounded joint structures, to enhance memory device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional methods are used to form memory openings and fill structures, then the manufacturing process is simpler, but the manufacturing precision and structural integrity are insufficient
Solution Approach 1:
The memory opening fill structure is divided into multiple tiers (first-tier, second-tier, third-tier) with distinct geometric configurations. Each tier is formed through separate etching and filling operations, allowing precise control over the geometry of each segment while achieving the overall complex structure through modular construction
Solution Approach 2:
Sacrificial material is deposited and patterned in advance to define the precise geometry of memory openings before the actual fill structure is formed. The sacrificial material serves as a template that guides subsequent etching and filling operations, ensuring manufacturing precision is achieved through pre-planned structural guidance
Solution Approach 3:
The multi-tier memory opening fill structure exhibits nested geometry where each tier is contained within the vertical extent of the overall structure. The first-tier, second-tier, and third-tier portions are nested vertically, with each tier having specific lateral dimensions that create a stepped configuration within the total structure height
2Reliability
If precise memory opening fill structures are formed, then the electrical properties improve, but the manufacturing complexity increases
Solution Approach 1:
Different tiers of the memory opening fill structure are assigned different lateral dimensions and geometric configurations optimized for their specific functional requirements. The first-tier portion has larger lateral dimensions for electrical connection, while upper tiers have reduced dimensions for isolation, creating local quality variations that enhance overall electrical properties
Solution Approach 2:
Rounded joint structures are formed at the interfaces between different tiers of the memory opening fill structure. These curved transitions replace sharp corners with smooth radii, reducing stress concentration and improving electrical field distribution, thereby enhancing reliability through geometric curvature
3Strength
If multi-tier memory openings are formed with rounded joint structures, then the structural integrity is enhanced, but the manufacturing precision requirements increase
Solution Approach 1:
Rounded joint structures with controlled radius of curvature are formed at the interfaces between memory opening fill structure tiers. The curvature is achieved through controlled etching processes that create smooth transitions rather than sharp angles, enhancing structural integrity by distributing mechanical stress more evenly across joint regions
Solution Approach 2:
The manufacturing process controls the geometry of rounded joints by adjusting etching parameters such as etch depth, etch rate, and lateral etch dimensions. By precisely controlling these process parameters, the radius of curvature and overall shape of rounded joints are optimized to achieve both structural integrity and manufacturing feasibility
Data Source
AI summary
A sacrificial memory opening fill structure for a multi-tier memory device may include a semiconductor fill material portion a metallic fill material portion to enhance control of a vertical cross-sectional profile of an inter-tier memory opening. Multiple inter-tier dielectric layers may be employed to reduce sharp corners in a memory opening fill structure. Alternatively or additionally, a combination of an isotropic etch process followed by an anisotropic etch process may be used to form a first-tier memory opening.


