Semiconductor Memory Over Driving via Segmented Block Units
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor memory devices face limitations in over-driving sense amplifiers due to reduced voltage driving capability of PMOS transistors, leading to reduced data-driving capacity and increased RC delay, which affects the efficiency of bit line data amplification and sensing speed.
Innovation Solution
The semiconductor memory device incorporates an over driver and internal voltage driver to apply external and internal voltages specifically during sensing and amplification periods, respectively, with a current adjustment circuit to manage current flow and block signal generation for targeted over-driving operations across memory block units, thereby enhancing the over-driving effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If external voltage is applied through a mesh structure power line to over-drive the sense amplifier, then the sensing speed is improved, but the over-driving effect is remarkably reduced due to RC delay in vulnerable nodes
Solution Approach 1:
The memory block units are divided into multiple segments, with different over-driving schemes applied to different segments. This segmentation allows the system to overcome the RC delay limitations of mesh structure power lines by providing localized over-driving support, ensuring reliable over-driving effect in each segment while maintaining overall sensing speed improvement.
Solution Approach 2:
Different voltage application strategies are applied to different regions of the memory array. Specifically, first over-driving schemes are applied to first memory block units while second over-driving schemes are applied to second memory block units, allowing each region to receive optimized over-driving support according to its specific RC delay characteristics and vulnerability.
2Area of stationary object
If the size of PMOS transistor in the sense amplifier is reduced to fit smaller chip size, then the chip size is reduced, but the voltage driving capability and data-driving capability are reduced
Solution Approach 1:
An over-driving unit is introduced as an intermediary component that provides additional voltage support to the sense amplifier. This mediator compensates for the reduced voltage driving capability of the downsized PMOS transistor, enabling the sense amplifier to maintain sufficient data-driving capability while operating with a smaller chip size.
Solution Approach 2:
The voltage parameters applied to the sense amplifier are dynamically changed through over-driving schemes. By adjusting and increasing the voltage levels during sensing operations, the system compensates for the reduced voltage driving capability of the smaller PMOS transistor, maintaining effective data driving despite the size reduction.
3Ease of manufacture
If conventional over-driving method is used with mesh structure power line, then the implementation is simple, but vulnerable nodes are created and over-driving effect is reduced
Solution Approach 1:
The memory array is segmented into multiple memory block units with different over-driving schemes, transforming the simple but unreliable conventional approach into a more complex segmented architecture that maintains reliability while preserving ease of implementation through modular design.
Solution Approach 2:
Different over-driving schemes are applied locally to different memory block units based on their specific characteristics. This localized approach eliminates the vulnerable nodes problem in the mesh structure by providing targeted over-driving support where needed, while maintaining implementation simplicity through region-specific configurations.
Data Source
AI summary
A semiconductor memory device may include a power line, an over driver, and/or an internal voltage driver. The power line may be connected to at least one sense amplifier. The at least one sense amplifier may be connected to a memory cell included in a memory block. The memory block may be included in one of a plurality of memory block units including one or more memory blocks. The over driver may be configured to apply an external voltage to the power line in a sensing period of the sense amplifier. The internal voltage driver may be configured to apply an internal voltage to the power line in an amplification period of the sense amplifier. The over driver may be configured to perform an over driving operation by each memory block unit.