Semiconductor Memory Device Over-Erase Correction
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Solution Overview
Problem
In semiconductor memory devices, the interference phenomenon between adjacent memory cells during programming operations leads to shifts in threshold voltages, causing data read errors and reducing the sensing margin, especially in Multi-Level Cell (MLC) programming methods.
Innovation Solution
The proposed solution involves performing specific program loops for LSB and MSB data storage, including first and second program loops for each type of data, and using a control circuit to detect and raise the threshold voltages of over-erased memory cells to minimize interference and maintain proper voltage distributions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cell size is reduced to increase storage capacity, then storage density is improved, but interference phenomenon between adjacent memory cells increases causing threshold voltage shifts
Solution Approach 1:
The patent segments the programming operation into multiple distinct loops (first LSB program loop, second LSB program loop, first MSB program loop, second MSB program loop) with different voltage conditions. Each loop targets specific memory cells based on their threshold voltage characteristics, allowing precise control over which cells are programmed and how their voltages are adjusted, thereby minimizing interference with adjacent cells.
Solution Approach 2:
The patent applies different voltage conditions and programming operations to different groups of memory cells based on their local characteristics. Memory cells are divided into first and second groups with different threshold voltage ranges, and each group receives tailored programming treatment. This local differentiation allows the system to maintain high storage density while reducing interference effects in specific cell regions.
2Adaptability or versatility
If threshold voltage distribution is widened by interference phenomenon, then more data levels can be stored, but sensing margin between different data levels is reduced
Solution Approach 1:
The patent performs preliminary classification of memory cells into first and second groups based on their initial threshold voltage characteristics before programming. The second LSB program loop specifically targets over-erased memory cells in the first group to raise their threshold voltages to a target level before subsequent MSB programming. This preliminary action ensures that cells are properly prepared and prevents excessive threshold voltage shifts during later programming stages, maintaining adequate sensing margins.
Solution Approach 2:
The patent dynamically adjusts programming parameters including voltage levels and programming loop sequences based on the threshold voltage distribution state of memory cells. By changing verification voltages and programming conditions across different loops, the system optimizes the threshold voltage distribution to maintain both high data storage capacity and adequate sensing margins between different data levels.
3Manufacturing precision
If multiple program loops are performed to reduce interference, then threshold voltage control is improved, but programming time increases
Solution Approach 1:
The patent employs periodic programming loops with alternating focus on different memory cell groups and data bits (LSB and MSB). The structured sequence of four program loops with periodic verification and voltage adjustment creates an efficient rhythm of programming operations that achieves precise threshold voltage control while minimizing redundant operations and overall programming time.
4Productivity
If over-erased memory cells are not corrected, then programming speed is maintained, but interference phenomenon increases affecting adjacent cells
Solution Approach 1:
The second LSB program loop serves as a preliminary correction stage that specifically identifies and repairs over-erased memory cells before they undergo subsequent MSB programming. By detecting and raising the threshold voltages of over-erased cells in the first group to a target level, the system eliminates the source of interference that would otherwise affect adjacent cells during later programming operations, maintaining both speed and reliability.
Data Source
AI summary
An operating method of a semiconductor memory device includes performing a first LSB program loop for storing first LSB data in first memory cells of a word line, performing a second LSB program loop for storing second LSB data in second memory cells of the selected word line and for detecting over-erased memory cells having threshold voltages lower than an over-erase reference voltage of a negative potential to raise the threshold voltages to be higher than the over-erase reference voltage, performing a first MSB program loop for storing first MSB data in the first memory cells, and performing a second MSB program loop for storing second MSB data in the second memory cells.