Nonvolatile Memory Programming via Overlapping Pulse Signals
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Solution Overview
Problem
Existing nonvolatile semiconductor memory devices require large amounts of power and have long programming durations due to the need to program tens of thousands of memory cells, making current programming methods inefficient.
Innovation Solution
Divide memory cells into groups and generate successive overlapping pulse signals for programming, allowing for reduced power consumption and shorter programming times by applying pumped voltage to each group sequentially.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If all memory cells are programmed simultaneously using conventional methods, then programming completeness is achieved, but instantaneous power consumption becomes excessively high
Solution Approach 1:
The memory cell array is divided into multiple banks (e.g., first bank and second bank), and programming is performed on different banks at different times. This segmentation of the programming process across temporal and spatial dimensions reduces the number of cells being programmed simultaneously, thereby reducing instantaneous power consumption while maintaining overall programming throughput.
Solution Approach 2:
The patent employs periodic programming pulses applied in sequential time intervals to different memory banks. Instead of applying programming voltage to all cells simultaneously, the method uses time-divided periodic action where each bank receives programming attention in turn, reducing peak power demands while achieving complete programming of all cells.
2Productivity
If conventional programming methods are used for high-density memory devices, then all memory cells can be programmed, but the programming duration becomes unacceptably long
Solution Approach 1:
The patent implements continuous programming operation by overlapping the programming cycles of different memory banks. While one bank is being programmed, another bank can be prepared or is being programmed in parallel phases, ensuring that the programming process never completely stops. This continuous action reduces total programming duration compared to sequential programming of each bank.
Solution Approach 2:
The method applies preliminary programming pulses to certain memory banks before final programming completion. By preparing and partially programming banks in advance and then completing the process in an optimized sequence, the overall programming duration is reduced while ensuring all cells receive the necessary programming voltage.
3Productivity
If programming voltage is applied to all memory cells at once, then programming efficiency is maximized, but power supply requirements become impractical
Solution Approach 1:
The memory cell array is divided into multiple banks (e.g., first bank and second bank), and programming is performed on different banks at different times. This segmentation of the programming process across temporal and spatial dimensions reduces the number of cells being programmed simultaneously, thereby reducing instantaneous power consumption while maintaining overall programming throughput.
Solution Approach 2:
The patent applies programming voltage locally to specific memory banks rather than globally to the entire memory array. By concentrating programming voltage on one bank at a time (or a limited number of banks), the local power density is controlled and kept within practical power supply capabilities, while the entire array is eventually programmed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces instantaneous power consumption and shortens the overall programming duration by applying voltage to memory cells in overlapping pulses, improving efficiency in high-density memory devices.
Implementation Method 1
the pump circuit 39 generates a pumped output voltage VC having a level higher than a power supply VDD
Implementation Method 2
during the program operation, hot electrons need to be injected from the channel region adjacent to the drain region 15 to the floating gate electrode, so that the threshold voltage of the EEPROM cell increases
Data Source
AI summary
A method for programming a plurality of memory cells of a nonvolatile semiconductor memory device comprises the steps of: dividing the plurality of memory cells into M number of groups (M is an integer); successively selecting each of the M number of groups; generating M number of successive overlapping pulse signals; and programming the memory cells of the M number of groups in response to the respective M number of successive overlapping pulse signals.


