Memory Data Packet Mapping for Bounded Fault Compliance
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in ensuring that errors in data and metadata do not cross fault lines, which are boundaries beyond which external error correction devices cannot correct errors, leading to uncorrectable errors.
Innovation Solution
The data and metadata are mapped within the memory array such that they are provided to DQ terminals in a bounded fault-compliant manner, ensuring that errors do not exceed the correction capabilities of external error correction devices by confining them to a single DQ or nibble, thereby maintaining bounded fault compliance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data and metadata are stored in the memory array without specific mapping constraints, then the memory device can operate with simpler internal organization, but errors may cross fault lines and become uncorrectable by external error correction devices
Solution Approach 1:
The memory array is segmented into distinct regions for data and metadata storage, with specific mapping rules that assign data bits to even DQ terminals and metadata bits to odd DQ terminals. This segmentation ensures that errors remain confined within correction boundaries while maintaining organized memory structure.
Solution Approach 2:
Different regions of the memory array are assigned different functions: data storage regions are mapped to specific DQ terminals while metadata regions are mapped to other DQ terminals. This local differentiation ensures that errors in data do not propagate to metadata and vice versa, maintaining bounded fault compliance.
2Reliability
If data and metadata are mapped to separate DQ terminals with bounded fault compliance, then errors are confined and remain correctable, but the memory device requires more complex mapping logic
Solution Approach 1:
The data bus is segmented into multiple DQ terminals with specific assignment rules: data bits are assigned to even-numbered DQ terminals while metadata bits are assigned to odd-numbered DQ terminals. This segmentation creates natural error boundaries that prevent error propagation while maintaining manageable mapping logic.
Solution Approach 2:
The memory device includes mapping logic that acts as an intermediary between the memory array and the DQ terminals. This intermediary component implements the bounded fault-compliant mapping rules, translating internal memory addresses to appropriate DQ terminals while ensuring error confinement.
3Quantity of substance
If multiple memory devices are packaged together in a memory module, then the system can provide increased storage capacity, but the complexity of ensuring bounded fault compliance across multiple devices increases
Solution Approach 1:
Each memory device in the module is independently configured with bounded fault-compliant mapping, segmenting the overall system into multiple error-isolated units. This segmentation ensures that errors in one device do not affect other devices, maintaining system-wide reliability while scaling storage capacity.
Solution Approach 2:
The bounded fault-compliant mapping approach is universally applied across all memory devices in the module, providing a standardized error correction mechanism that works consistently regardless of the number of devices. This universal application simplifies module-level design while maintaining error correction capabilities.
Data Source
AI summary
Apparatuses, systems, and methods for bounded fault compliance may include data packet definitions that cause metadata to be provided on a single DQ terminal in some examples. Metadata stored in different regions of a memory array are provided on different DQs in the data packet definition in some examples. The data packet definition may include empty or undefined portions in some examples. The data packet definition may cause the metadata to be output at a midpoint of a data burst in some examples.