Memory Pad Crack Detection Using Pulse Delay Lines
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Solution Overview
Problem
Semiconductor memory devices face operational issues due to cracks in pads caused by external stresses during testing, which are difficult to detect effectively using existing methods.
Innovation Solution
A memory device with a crack detection structure arranged below the pads, generating a test pulse signal and measuring the delay of a pulse signal as it passes through the pads to determine if cracks are present, allowing for accurate detection of pad cracks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If pads are stressed during testing (probes or wire bonding), then testing can be performed, but cracks may occur in the pads
Solution Approach 1:
The patent applies preliminary action by forming the crack detection structure (conductive lines) below the pads before the pads are stressed during testing. This pre-positioned structure allows detection of cracks that may occur during subsequent probing or wire bonding operations, enabling early identification of damaged pads before they cause operational failures.
2Ease of manufacture
If existing detection methods are used, then simple testing is possible, but pad cracks cannot be detected effectively
Solution Approach 1:
The patent introduces an intermediary crack detection structure consisting of conductive lines positioned below the pads. This intermediate structure serves as a mediator between the pads and the detection system, allowing indirect detection of pad cracks through electrical continuity measurements. The conductive lines transfer crack information from the pads to measurement equipment without requiring direct inspection of the pads themselves.
3Measurement precision
If crack detection structure is added below pads, then crack detection capability is improved, but device complexity increases
Solution Approach 1:
The patent merges the crack detection structure with existing device layers by forming conductive lines in lower metal layers that are already part of the device architecture. Rather than adding completely separate detection components, the conductive lines are integrated into the existing multi-layer structure, sharing fabrication processes and spatial arrangement with other device elements.
Solution Approach 2:
The conductive lines in the crack detection structure serve multiple functions: they act as both interconnect elements for device operation and as sensing elements for crack detection. This multi-functionality reduces the need for dedicated detection components, thereby minimizing the increase in device complexity while maintaining effective crack detection capability.
Data Source
AI summary
Disclosed is a memory device. The memory device includes a memory cell array; a first pad configured to receive a command from an external device; a second pad configured to exchange data with the external device; a third pad; test logic configured to generate a test pulse signal based on a test command received through the first pad; and a crack detection structure formed below the third pad and configured to include lines connected in series from the test logic to the second pad. A crack occurring in the third pad is detected based on a delay of a delay pulse signal changed when the test pulse signal passes through the crack detection structure.