Memory Device Page Buffer Controller Dynamic Voltage Management
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Solution Overview
Problem
Current memory devices face challenges in reducing the time required for program operations while minimizing peak current flow through bit lines, which can lead to performance degradation and increased completion time.
Innovation Solution
The implementation of a memory device with a page buffer controller that provides controlled voltage signals, including pulse and ramp signals, to manage bit line voltages during program operations, optimizing the precharge, program, and verify periods to reduce peak current and enhance operation efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the program operation is accelerated to decrease completion time, then the productivity is improved, but the peak current flowing through the bit line increases
Solution Approach 1:
The patent applies dynamics by making the page buffer sensing signal voltage variable rather than fixed. The voltage level changes dynamically based on the program loop count, transitioning from a first voltage level in early loops to a second voltage level in later loops. This dynamic adjustment allows the system to optimize between programming speed and current management at different stages of the program operation.
Solution Approach 2:
The patent changes the voltage parameter of the page buffer sensing signal according to the program loop count. By adjusting the voltage level from a first level to a second level based on the number of program loops completed, the system optimizes the balance between programming speed and peak current reduction, directly addressing the technical contradiction between productivity and power consumption.
2Device complexity
If a fixed voltage level is used for the page buffer sensing signal, then the device complexity is reduced, but the ability to optimize performance across different program stages is limited
Solution Approach 1:
The patent introduces dynamics into the page buffer controller by implementing variable voltage generation based on program loop count. Rather than using a fixed voltage source, the system dynamically adjusts the sensing signal voltage level according to the current program stage, enabling optimized performance across different programming phases without requiring overly complex external control circuits.
Data Source
AI summary
There are provided a memory device for improving performance by decreasing a time at which a program operation is completed while decreasing a peak current flowing through a bit line, and an operating method of the memory device.