Memory Device Page Buffer Grouping for Verify Accuracy
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Solution Overview
Problem
Current memory devices face challenges in achieving accurate verify operations, leading to potential uncorrectable errors during data storage and retrieval processes.
Innovation Solution
The memory device incorporates a current sensing circuit and control logic that group page buffers into logical and physical groups, performing first and second verify operations to determine if uncorrectable errors are present, ensuring accurate data verification through a verify pass signal only when both operations meet a pass criterion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single verify operation is performed on all page buffers, then the operation speed is maintained, but the accuracy of error detection is insufficient leading to potential uncorrectable errors
Solution Approach 1:
The patent divides the page buffers into multiple groups (first group, second group, etc.) and performs separate verify operations on each group. This segmentation allows the system to achieve higher accuracy by individually verifying each group while managing complexity through organized group-based processing rather than handling all buffers as a single unit.
2Reliability
If multiple verify operations are performed on different page buffer groups, then the accuracy of error detection is improved, but the operation time increases
Solution Approach 1:
By segmenting page buffers into groups and verifying them separately, the system can identify and handle errors more efficiently. This allows parallel processing potential and prevents re-verification of already correct groups, thereby reducing total operation time while maintaining high accuracy.
Solution Approach 2:
The patent performs verify operations on specific groups of page buffers in a predetermined sequence, allowing early detection of errors in certain groups. This preliminary verification of critical groups enables the system to potentially skip or simplify verification of other groups, reducing overall operation time.
3Measurement precision
If page buffers are grouped and verified separately, then the accuracy of verify operation is enhanced, but the control complexity increases
Solution Approach 1:
The control logic manages complexity by organizing page buffers into distinct groups with clear identification (first group, second group). Each group can be verified independently with dedicated control signals, making the control logic more manageable and systematic rather than dealing with individual buffers or complex mixed groups.
Solution Approach 2:
The control logic is designed to handle multiple groups of page buffers using a universal verification process. The same verification circuitry and control mechanism can be applied to different groups, reducing the need for specialized control logic for each group and thereby managing complexity while maintaining precision.
Data Source
AI summary
The present technology relates to an electronic device. According to the present technology, a memory device having improved verify accuracy may include a memory block including memory cells, a read and write circuit including a plurality of page buffers, a current sensing circuit configured to perform a verify operation of comparing sensing voltages with a reference voltage, and a control logic configured to control the current sensing circuit to perform the verify operation. The control logic controls performing a first verify operation on each of page buffer groups having a same logical group number, and performing a second verify operation on each of page buffer groups having a same physical group number, and the current sensing circuit outputs a verify pass signal in response to both results of the first verify operation and the second verify operation satisfying a pass criterion.