Memory Page Buffer Sensing Latch Initialization
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Solution Overview
Problem
Current memory devices face inefficiencies in read operations due to the time required for data sensing, particularly during the bit line precharge, evaluation, and sensing latch initialization periods, which can slow down overall memory performance.
Innovation Solution
Incorporating a page buffer and a reset controller that initializes data storage during the evaluation period, allowing for faster data sensing by controlling precharge and evaluation signals, thereby reducing the time needed for read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the sensing latch is initialized after the evaluation period, then the data storage is ensured to be ready for the next operation, but the read operation time is increased due to sequential execution
Solution Approach 1:
The sensing latch initialization is performed preliminarily during the evaluation period rather than after it completes. The reset controller activates the initialization signal concurrently with the evaluation signal, so that by the time the evaluation period ends, the sensing latch is already initialized and ready for the next read operation, eliminating the need for a separate initialization period.
Solution Approach 2:
The useful action of initializing the sensing latch continues throughout the evaluation period without interruption. Instead of completing evaluation first and then initializing, the initialization process runs continuously alongside the evaluation, maximizing resource utilization and reducing total operation time.
2Speed
If the data storage is initialized during the evaluation period, then the read operation speed is improved, but the control complexity increases due to overlapping operations
Solution Approach 1:
The reset controller is designed to perform multiple functions: it controls both the evaluation signal that enables the sensing operation and the initialization signal that resets the sensing latch. This multi-functionality allows coordinated control of overlapping operations without requiring separate control circuits, thus managing complexity while achieving faster read speeds.
3Measurement precision
If separate periods are used for evaluation and sensing latch initialization, then each operation can be completed thoroughly, but the overall data sensing time is extended
Solution Approach 1:
The evaluation period and sensing latch initialization period are merged into a single time window. Both operations share the same time resource without interfering with each other's precision, as the reset controller coordinates their signals to ensure proper sequencing within the overlapped timeframe, thereby reducing total data sensing time while maintaining accuracy.
Data Source
AI summary
Provided herein may be a memory device and a method of operating the memory device. The memory device includes a memory cell, a page buffer coupled to the memory cell through a bit line and configured to perform a read operation of sensing data stored in the memory cell, wherein the page buffer includes a data storage configured to store data sensed from the memory cell, the read operation includes a precharge period during which a precharge voltage is applied to the bit line, an evaluation period during which a state of the memory cell is incorporated into a voltage of the bit line, and a data storage period during which the data sensed through the bit line is stored in the data storage, and the data storage is initialized during the evaluation period.