Memory Page Buffer Bit Line Precharge Noise Reduction
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Solution Overview
Problem
Memory devices experience reliability issues due to source line noise during read operations, which can cause errors in sensing and verify operations, primarily due to high current consumption and resulting voltage disturbances.
Innovation Solution
The memory device incorporates a page buffer with a storage unit that controls bit line precharge operations and stores result values from sensing operations, with specific voltage management strategies, including bit line recovery and sense node voltage changes based on threshold voltages, to mitigate source line noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high current is consumed during sensing operation, then read operation speed is improved, but source line noise increases causing sensing errors
Solution Approach 1:
The patent applies preliminary action by performing a bit line precharge operation before the sensing operation. During this precharge phase, the bit line is charged to a predetermined voltage level in advance, so that when the sensing operation starts, the bit line is already at the required voltage state. This allows the sensing operation to proceed without requiring excessive current draw that would cause source line noise, while still achieving accurate sensing results.
2Measurement precision
If bit line precharge operation is performed, then sensing accuracy is improved, but operation time increases
Solution Approach 1:
The patent applies partial action by performing the bit line precharge operation only when necessary, rather than continuously. The precharge operation is selectively executed based on the specific sensing requirements, charging the bit line to the required voltage level only before actual sensing operations. This partial application of the precharge mechanism achieves sufficient sensing accuracy without the time penalty of continuous precharging.
3Reliability
If storage unit inverts value before storing, then noise immunity is improved, but device complexity increases
Solution Approach 1:
The patent applies the intermediary principle by introducing a storage unit as an intermediate component between the sensing operation and the final data output. The storage unit temporarily holds the sensing result value and performs an inversion operation on this intermediate data before storing it. This intermediary storage and inversion mechanism provides noise immunity by allowing the system to compensate for voltage disturbances during the inversion process, while the added complexity is localized to this specific intermediate handling rather than the entire system.
Data Source
AI summary
Presented herein is a memory device and a method of operating the memory device. The memory device may include a memory cell, and a page buffer coupled to the memory cell via a bit line and configured to perform a read operation on the memory cell. The page buffer may include a storage unit configured to control a bit line precharge operation during the read operation and to store a result value of a first sensing operation. After the bit line precharge operation, a value stored in the storage unit is inverted before the storage unit stores the result value of the first sensing operation.