Nonvolatile Memory Page Buffer Voltage Setting

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Solution Overview

Problem

Nonvolatile memory devices face inefficiencies in verification operations due to the need for multiple verification voltages and increased program/erase cycles, leading to prolonged program times and potential over-programming issues.

Innovation Solution

A method that includes a page buffer, counter, and program pulse application number storage unit to optimize program operations by setting a program start voltage based on the number of pulses required to exceed a verification voltage, using a blind verification method to reduce unnecessary verification operations and adjust the program start voltage for subsequent pages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple verification voltages are used in MLC program method, then programming accuracy is improved, but verification operation time increases

Engineering Contradiction:

Improveprogramming accuracyVSAvoidverification operation time

Core Design Contradiction:

Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing a blind verification method that executes only a subset of verification operations (specifically, only the first verification voltage) during the program operation. This preliminary partial verification allows the system to proceed with program pulses without waiting for all verification voltages to complete, thereby reducing verification operation time while maintaining programming accuracy through subsequent complete verification when needed.

Inventive Principle:

Principle #10Preliminary action

2Speed

If the number of program/erase cycles increases, then program speed increases, but over-programming risk increases

Engineering Contradiction:

Improveprogram speedVSAvoidover-programming prevention

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The patent implements feedback by continuously monitoring verification results during the program operation and using this information to dynamically control the application of program pulses. The verification operation provides feedback on whether cells have reached the target threshold voltage, and this feedback is used to stop further programming when the target is achieved, preventing over-programming even as program speed increases with more cycles.

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The patent applies partial action by using the blind verification method that performs only some verification operations (not all verification voltages) during active programming. This partial verification is sufficient to monitor progress and prevent excessive programming, allowing faster program speeds without the full overhead of complete verification at every step.

Inventive Principle:

Principle #16Partial or excessive action

3Manufacturing precision

If verification operations are performed frequently, then programming precision is improved, but program time increases

Engineering Contradiction:

Improveprogramming precisionVSAvoidprogram time

Core Design Contradiction:

Manufacturing precisionVSProductivity

Solution Approach 1:

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes verification operation time and optimizes program speed by setting an appropriate program start voltage for each page, reducing the time taken for program operations and preventing over-programming.

Implementation Method 1

The nonvolatile memory device is configured to enable electrical program and erase operations and perform the program and erase operations through the threshold voltage of a cell which varies when electrons are moved by a strong electric field applied to a thin oxide layer.

Methodology Applied

Scientific EffectThreshold voltage variation:

Implementation Method 2

The page buffer is configured to output a 1-bit pass signal when a cell programmed to exceed a reference voltage, from among target program cells included in a single page, exists.

Methodology Applied

Scientific EffectElectrical voltage comparison:

Data Source

PatentUS8174896B2Nonvolatile memory device and method of operating the same

Publication Date: 2012.05.08 SK HYNIX INC

AI summary

A nonvolatile memory device comprises a page buffer unit, a counter, a program pulse application number storage unit, and a program start voltage setting unit. The page buffer is configured to output a 1-bit pass signal when a cell programmed to exceed a reference voltage, from among target program cells included in a single page, exists. The counter is configured to count a number of program pulses applied to determine a program pulse application number. The program pulse application number storage unit is configured to store a number of program pulses applied until the 1-bit pass signal is received during a program operation for a first page. The program start voltage setting unit is configured to set a program start voltage for a second page based on the stored program pulse application number.