Selective Sampling of Memory Pages During Program Erase Cycles
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory sub-systems face performance and latency issues due to the need for comprehensive scanning of all pages during program erase cycles, which is time and bandwidth-consuming, and can lead to reduced efficiency and increased latency.
Innovation Solution
Implement selective sampling of data units based on error rate change patterns, where a subset of pages is scanned at uniform intervals, shifting the starting page with each cycle to ensure all pages are eventually scanned, reducing the overhead of scanning operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If comprehensive scanning of all pages is performed during program erase cycles, then health check coverage is improved, but scanning time and resource consumption increase
Solution Approach 1:
The patent divides the memory device into multiple data units and further segments each data unit into multiple pages. During program erase cycles, instead of scanning all pages comprehensively, the system selectively scans only certain pages from each data unit based on predetermined patterns. This segmentation allows the health check coverage to be maintained across all data units over multiple cycles while reducing the scanning burden in any single cycle.
Solution Approach 2:
The patent implements periodic scanning where different sets of pages are scanned in alternating program erase cycles. In first PECs, certain pages are scanned while in second PECs, different pages are scanned. This periodic action ensures that all pages are eventually scanned and monitored for defects, maintaining comprehensive health check coverage while distributing the scanning workload over time to reduce per-cycle scanning time.
2Measurement precision
If comprehensive scanning of all pages is performed during program erase cycles, then defect detection capability is improved, but bandwidth consumption and latency increase
Solution Approach 1:
By segmenting the scanning task across multiple program erase cycles and selectively scanning different pages in each cycle, the system maintains defect detection capability for all pages while avoiding the bandwidth consumption and latency associated with scanning all pages in every cycle. The segmented approach allows defect detection to be distributed over time rather than concentrated in a single resource-intensive operation.
Solution Approach 2:
The patent applies partial action by scanning only a subset of pages during each program erase cycle rather than performing exhaustive scanning of all pages. This partial scanning approach is sufficient to detect defects when applied periodically across multiple cycles, while significantly reducing bandwidth consumption and improving memory sub-system efficiency compared to comprehensive scanning.
3Productivity
If selective sampling is implemented, then scanning overhead is reduced, but risk of missing defects increases
Solution Approach 1:
The patent employs periodic action where different sets of pages are scanned in alternating program erase cycles. This ensures that all pages are periodically examined for defects, maintaining defect detection reliability despite selective sampling in any single cycle. The periodic comprehensive coverage across multiple cycles compensates for the selective nature of individual scans.
Solution Approach 2:
The system performs preliminary actions by scanning certain pages during first program erase cycles and then scanning different pages during second program erase cycles. This preliminary and sequential scanning approach ensures that all pages are eventually checked, maintaining defect detection reliability while reducing scanning overhead through selective sampling at any given time.
Data Source
AI summary
A processing device, operatively coupled with the memory device, is configured to determine a first error rate associated a first set of pages of a plurality of pages of a data unit of a memory device, and a second error rate associated with a second set of pages of the plurality of pages of the data unit, determine a first pattern of error rate change for the data unit based on the first error rate and the second error rate, and responsive to determining that the first pattern of error rate change corresponds to a predetermined second pattern of error rate change, perform an action pertaining to defect remediation with respect to the data unit.