Nonvolatile Memory Parasitic Areas for Data Retention
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Solution Overview
Problem
Non-volatile memory devices face challenges in data retention due to charge migration between memory cells, leading to read errors and reduced efficiency as feature sizes shrink and memory cells store more bits, causing voltage threshold changes that affect data states.
Innovation Solution
A method is introduced where a controller in non-volatile memory devices detects a writing threshold and drives a charge into parasitic areas between charge storage areas to reduce charge gradient and improve data retention, using a flash write operation with specific voltage levels and durations to manage electron distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells store more bits per cell to increase storage capacity, then storage density is improved, but charge migration between cells increases causing data retention degradation
Solution Approach 1:
The charge trapping layer is segmented into distinct charge storage areas separated by parasitic areas. This segmentation prevents charge migration between adjacent memory cells by introducing intermediate regions that act as barriers, thereby maintaining data retention while enabling multi-bit storage per cell.
Solution Approach 2:
Parasitic areas are introduced as intermediary regions between charge storage areas. These parasitic areas serve as buffer zones that intercept and contain charge, preventing it from migrating to neighboring cells. This intermediary structure enables higher storage capacity while preserving data integrity.
2Area of moving object
If feature sizes are reduced to increase memory density, then storage capacity is improved, but voltage threshold changes increase causing read errors
Solution Approach 1:
Different regions of the memory structure are assigned different functions: charge storage areas are optimized for charge retention while parasitic areas are designed to control charge distribution. This local differentiation allows precise control of voltage thresholds in each region, maintaining read accuracy despite reduced feature sizes.
Solution Approach 2:
The invention controls voltage threshold parameters by manipulating charge distribution in parasitic areas. By adjusting the charge state of parasitic areas, the voltage threshold of adjacent memory cells can be precisely controlled, compensating for variations caused by scaled-down feature sizes and preventing read errors.
3Duration of action of stationary object
If charge is stored in memory cells for long periods to enable non-volatile storage, then data retention is improved, but charge diffusion increases causing read errors
Solution Approach 1:
The continuous charge trapping layer is divided into discrete charge storage areas separated by parasitic areas. This segmentation confines charge to specific regions, preventing lateral diffusion over time. Memory cells can retain charge for extended periods without charge spreading to adjacent cells, maintaining both long-term retention and data accuracy.
Solution Approach 2:
The parasitic areas, which could be considered wasted space in a conventional structure, are converted into beneficial charge containment regions. These areas actively prevent charge diffusion by providing intermediate zones that trap and isolate charge, transforming a structural byproduct into a functional element that enhances data accuracy during long-term storage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances data retention by reducing lateral charge diffusion and neighboring word line interference, maintaining accurate data storage across multiple bits per cell, particularly in quad-level cell memory devices.
Implementation Method 1
susceptible to diffusion of charge during a rest state
Data Source
AI summary
A nonvolatile memory control method includes a step of writing, repeatedly to a nonvolatile memory cells. The method continues with detecting when writing reaches a writing threshold value. Upon reaching the writing threshold, the method continues with driving a charge to at least one parasitic area intermediate at least two charge storage areas of the nonvolatile memory cells to improve data retention in at least one of the at least two charge storage areas of the nonvolatile memory cells.