Solid-State Devices TRIZ Cases

Segmented reflecting layers with openings prevent moisture permeation, resolving the trade-off between high mirror reflectivity and display image transmittance.

An organic photoelectronic device uses specific charge buffer materials to optimize light absorption and charge transport within the active layer.

Rotating LED chips within reflective cups alters the far-field emission pattern, resolving inefficient light distribution caused by perpendicular peak emission.

Vacuum drying controls evaporation to form a flat electroactive layer, resolving film thickness non-uniformity in liquid deposition processes.

Asymmetric welding of long-side support bars corrects bending deflection to ensure precise pattern deposition accuracy.

Sequential nitrogen and oxidizing gas annealing compensates for oxygen vacancies in high-k dielectric layers, improving data retention.

Merging optical films with the touch sensor reduces volume and weight while absorbing incident light to improve visibility in bright environments.

Translucent spherical particles scatter light passing through a hemispherical lens, mixing wavelengths efficiently while maintaining a compact device size.

A buried multi-layer dielectric reflector redirects near infrared light back into photodiodes to increase absorption.

High refractive index filling in OLED through holes uses total internal reflection to prevent film layer absorption and boost under-panel camera sensor signal.

A closed conductive ring in the peripheral region connects to TFT lines to redirect electrostatic charges during substrate fabrication.

Small spot showerhead apparatus deposits materials using CVD or ALD processes to form multilayer film stacks on substrates.

A CuSiN compound barrier layer modulates copper ion injection efficiency in resistive random access memory devices.

Cluster head switch cells replace global distributed head switch cells to enable fine-grain power gating in memory channels.

Segmented alkanethiol and thiophenol layers increase grain size and reduce contact resistance, enabling low-voltage operation for wireless ID tags.

Local laser ablation on power electronic modules reduces thermomechanical stresses from thermal expansion mismatches, extending service life.

A display substrate design uses a transparent electrode to increase aperture ratio.

Shallow isolation trenches in an FDSOI integrated circuit minimize leakage currents while enabling distinct transistor threshold voltages.

UV-triggered azo group isomerization reduces adhesion strength, allowing carrier substrate removal without thermal damage or residual glue.

Ultrasonic vibration weakens solder bonds on disk drive sliders, enabling automated reclaim without manual labor or component damage.

Dual-hardness resin under a curved light emitting element widens light distribution and boosts extraction efficiency.

Receding photoresist corners and oxygen-suppressing gas reduce etch damage in variable resistance layers, minimizing resistance value variations.

Segmented mask sheets arranged in intersecting directions eliminate shadow defects while maintaining deposition uniformity across complex pixel arrays.

A driving circuit adjusts regulator voltage stabilization capability based on gray-scale signal presence to reduce power consumption.

Segmented organic and inorganic insulating layers reduce parasitic capacitance while maintaining wide-angle visibility in IPS mode displays.

Graphene spreading layer splits SiC substrates to improve light extraction and thermal management in III-nitride devices.

Composite airgap structures lower effective dielectric constant while maintaining insulation quality and manufacturing efficiency.

A transparent release agent layer in the camera region defines through holes to enhance alignment precision.

A negative differential resistance device uses composite materials with distinct thermal expansion coefficients to generate non-linear electrical resistance curves.

A liquid crystal element uses a high-resistance film between electrodes to enable continuous alignment changes of the liquid crystal molecules.

A secondary pixel electrode surrounds the primary pixel electrode near data lines to isolate interference and prevent coupling capacitor formation.

Mixing hole transport materials with higher LUMO levels creates energy barriers that prevent electron leakage and reduce crosstalk between adjacent subpixels.

Dielectric spacers define recesses for epitaxial growth, improving carrier mobility while maintaining electrical control at tight fin pitches.

Extending the auxiliary electrode vertically prevents void formation in under-cut regions while maintaining electrical connection reliability.

Applying electrical shunt means to the substrate electrode via connecting means outside the layer stack.

Spacing silicide layers from insulating films prevents hot electron injection and leakage current, maintaining threshold voltage stability.

A 10-100 nm organic conductive layer inside the light emitting layer adjusts brightness uniformity despite TFT threshold voltage shifts.

Cup-shaped heating electrodes reduce write currents by minimizing the contact surface with phase change material, enabling higher memory cell density.

An intermittent organic common layer blocks moisture penetration around the camera hole, resolving thickness and reliability trade-offs.

Transparent conductive layer discharges static electricity on thin film transistor substrates without widening metal lines or compromising sealant integrity.

A display panel uses a through-hole in its bending area to create a light transmitting zone when folded.

A memory device incorporates a buffer resistance layer to reduce reset resistance drift and improve endurance.

An organic dopant contact layer improves charge carrier injection while increasing functional device yield.

A radiation imaging device stacks photoelectric conversion and signal output portions in the thickness direction to maximize light-receiving area.

A memory structure uses select and floating gate transistors with varying gate widths to optimize current usage.

Selective capping layer openings relieve stress on color filters, preventing AUA defects and light leakage caused by gas entrapment during dry etching.

Monolithic semiconductor device manages discharge current through controlled breakdown voltage temperature coefficients.

Borosilicate glass matrix with alumina and titania fillers boosts flexural strength while enabling low-temperature sintering for LED substrates.

Segmented walls and intermediary layers resolve the contradiction between high luminance and heat dissipation in three-dimensional LED arrays.

Direct contact between distinct emitting layers optimizes electron-hole recombination, boosting luminous efficiency and extending device lifetime.

Multi-layer array substrate connects common electrode lines via vertical vias to reduce planar spacing.

An InGaN interlayer between the anode electrode and GaN layer increases band potential.

Directly forms touch electrodes and color filters on an encapsulation layer, eliminating separate adhesion processes that increase complexity and cost.

A field-effect semiconductor device uses a source electrode with limited Schottky contact to reduce on-resistance.

Driving charge into parasitic areas reduces lateral diffusion and neighboring interference, maintaining accurate data storage in quad-level cell devices.

A fingerprint sensor uses a protection layer with distinct permittivity regions to optimize capacitance sensing.

Shallow implants replace deep wells for FDSOI back biasing, reducing area consumption and simplifying threshold voltage swapping.

Protrusions on cofferdams boost adhesive force, preventing peeling between inorganic layers and passivation during bending.

Replacing sulfide phosphors with a red diode resolves reliability issues from atmospheric reactions while maintaining high color rendering.

Filling a hollow transparent substrate with a wavelength conversion layer reduces blue light leakage that causes retinal damage.

A light emitting device mounting board block uses a recessed resin molded body on a plate-shaped lead frame to reduce component depth.

Segmented sputter deposition and oxygen treatments optimize the tunnel barrier layer to reduce pinhole density and improve adhesion.

Segmented pixel defining layers with distinct wettability regions prevent dark spots and reduce electrode capacitance in OLED displays.

Batch color segmentation improves transfer efficiency while maintaining positioning accuracy for large-sized full-color displays.

Differentiating gate widths in MONOS memory cells increases the number of rewrites while maintaining high integration density.

Incorporating non-doping atomic species into SOI transistor regions creates junction leakage paths.

A display panel uses a valley portion in an organic insulating layer to separate pixel circuits from the active display area.

A transparent TFT array substrate uses silicon-based nanolines and a transparent gate electrode to form the semiconductor layer.

A pulsed laser method forms grooves on semiconductor wafers using ultra-short pulse widths and high peak energy density.

Simultaneous etching of stacked insulating layers eliminates stair-like steps at contact hole boundaries, preventing pixel electrode disconnection.

Tin-containing oxide transistors in the gate driver reduce dead space in organic light emitting diode displays.

Hollow channel structures feature inner large-grain and outer small-grain sub-regions to optimize electron transport.

An auxiliary electrode layer in the inter-subpixel region connects to a thin transparent cathode to lower sheet resistance.

Oxide semiconductor thin film transistor array panel resolves low mobility and high cost trade-offs by replacing silicon with composite materials.

Inclined micro-mesa slopes refract light at various angles, increasing extraction efficiency and maintaining brightness in miniaturized displays.

Segmented common electrode patterns ensure uniform developing solution concentration during photolithography.

External current injection sources modulate trigger voltage across multifinger semiconductor devices to ensure simultaneous turn-on.

A pixel structure uses an oxide semiconductor isolating layer patterned via wet etching to protect the first electrode.

Buried oxide transcap devices reduce interface charge traps to enable higher operating voltages with improved quality factor.

Ion implantation and annealing repair substrate lattice damage to enhance epitaxial growth uniformity and prevent channel hole blockage.

Merging touch panel electrodes into the display stack eliminates separate sensor layers, preventing thickness growth while maintaining flexibility.

A roll-to-roll process fabricates sensor element arrays on flexible substrates using patterned conductive layers and self-aligned channel structures.

Localized pad layers in SONOS gates enhance programming speed while maintaining data retention through spatially differentiated optimization.

Comparing circuits apply hysteresis thresholds to synchronize rectangular wave signals, eliminating detection delays during direction switches.

A photoconductor-on-active pixel device structure uses capping layers to protect conductive pads during dielectric deposition and selective etching.

Sedimented phosphor particles in conversion elements improve color homogeneity while partition walls reduce optical crosstalk between adjacent pixels.

A contact pad spacer prevents short failures caused by narrow alignment margins in high aspect ratio contact holes by constraining the upper contact pad area.

Composite structure prevents aluminum corrosion from alkali halide scintillators while maintaining high luminance.

A thin ruthenium barrier layer enables conformal plasma-enhanced chemical vapor deposition of subsequent metal films.

A support film attached via energy-curable glue maintains substrate strength during grinding.

A germanium-silicon electroabsorption modulator uses a parallel PIN junction structure to enable optical signal modulation.

A display substrate with Bragg reflection units enhances light emission through alternating refractive index layers.

A thin-film transistor array substrate uses a single mask to pattern gate, common, and source-drain electrodes simultaneously.

A buffer layer in the array region protects memory cells, enabling simultaneous etching of different dielectric materials to reduce operation errors.

A stacked OLED device structure connects anodes through a conductive layer to increase pixel resolution.

Segmented gate electrodes control channel regions independently to suppress short channel effects and leakage currents in nonvolatile memory structures.

Vertical through-silicon vias replace edge wires, resolving signal skew and area expansion while enabling selective chip activation modes.

Vertical contacts reach conductive layers at varying heights, eliminating stepped pads and reducing photomask counts.

Controlling the interlayer hole angle prevents source/drain layer thinning or breaking during manufacturing, improving product yield for AMOLED panels.

Solid phase crystallization creates extrinsic and intrinsic silicon regions, resolving mobility and cost trade-offs.